V. M. Harishchandra

Ultra-low voltage, power efficient continuous-time filters in 180 nm CMOS technology

Tonse Laxminidhi, Vasantha Moodabettu Harishchandra, S. Rekha, 2019, IET Circuits Devices Syst..

Hardware implementation of fault tolerance NoC core mapping

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2018, Telecommun. Syst..

An energy-efficient fault-aware core mapping in mesh-based network on chip systems

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2017, J. Netw. Comput. Appl..

High-performance and energy-efficient fault-tolerance core mapping in NoC

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2017, Sustain. Comput. Informatics Syst..

System level fault-tolerance core mapping and FPGA-based verification of NoC

Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, Naresh Kumar Reddy Becchu, 2017, Microelectron. J..