A. Kumar

A 56-entry instruction reorder buffer

N.B. Gaddis, J.R. Butler, A. Kumar, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

Few electron memories: finding the compromise between performance, variability and manufacturability at the nano-scale

A. Kumar, H. Silva, M.K. Kim, 2003, IEEE International Electron Devices Meeting 2003.

Modeling ESD protection

N. Mohan, A. Kumar, 2005, IEEE Potentials.

Back-gated SOI technology: power-adaptive logic and non-volatile memory using identical processing

A. Kumar, Haitao Liu, U. Avci, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

Ideas: a tool for VLSI CAD

G. Venkatesh, A. Kumar, S. Kumar, 1989, IEEE Design & Test of Computers.

Back-floating gate non-volatile memory

A. Kumar, U. Avci, S. Tiwari, 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).