Yunlong Xu

SRAM- and STT-RAM-based hybrid, shared last-level cache for on-chip CPU–GPU heterogeneous architectures

Depei Qian, Han Zhang, Hailong Yang, 2018, The Journal of Supercomputing.

Performance Prediction Model in Heterogeneous MapReduce Environments

Qian Li, Yunlong Xu, Weiguo Wu, 2014, 2014 IEEE International Conference on Computer and Information Technology.

SRAM- and STT-RAM-based hybrid, shared last-level cache for on-chip CPU–GPU heterogeneous architectures

Han Zhang, D. Qian, Hailong Yang, 2018, The Journal of Supercomputing.