G. Wu

A Novel Algorithm for Broadcasting in Multiple Channel Mobile Environment

Guang-Ming Wu, D. Tsaih, G. Wu, 2007 .

B*-trees: a new representation for non-slicing floorplans

Yao-Wen Chang, Yun-Chih Chang, Guang-Ming Wu, 2000, Proceedings 37th Design Automation Conference.

Performance-driven placement for dynamically reconfigurable FPGAs

Yao-Wen Chang, Jai-Ming Lin, Guang-Ming Wu, 2002, TODE.

Quasi-Universal Switch Matrices for FPD Design

Yao-Wen Chang, Guang-Ming Wu, Yao-Wen Chang, 1999, IEEE Trans. Computers.

Switch-matrix architecture and routing for FPDs

Yao-Wen Chang, Guang-Ming Wu, Yao-Wen Chang, 1998, ISPD '98.

A clustering- and probability-based approach for time-multiplexed FPGA partitioning

Yao-Wen Chang, Iris Hui-Ru Jiang, Guang-Ming Wu, 1999, Integr..

Rectilinear block placement using B*-trees

Yao-Wen Chang, Guang-Ming Wu, Yun-Chih Chang, 2000, Proceedings 2000 International Conference on Computer Design.

Generic universal switch blocks

Yao-Wen Chang, Guang-Ming Wu, Michael Shyu, 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

Analysis of FPGA/FPIC switch modules

Chak-Kuen Wong, Yao-Wen Chang, Martin D. F. Wong, 2003, TODE.

Generic ILP-based approaches for dynamically reconfigurable FPGA partitioning

Yao-Wen Chang, Jai-Ming Lin, Guang-Ming Wu, 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.

Generic ILP-based approaches for time-multiplexed FPGA partitioning

Yao-Wen Chang, Jai-Ming Lin, Guang-Ming Wu, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Universal switch blocks for three-dimensional FPGA design

Yao-Wen Chang, Guang-Ming Wu, Michael Shyu, 1999, FPGA '99.