Charles R. Yount

Software-Implemented Fault Injection of Transient Hardware Errors

Daniel P. Siewiorek, Charles R. Yount, D. Siewiorek, 1994 .

Using Model Trees for Computer Architecture Performance Analysis of Software Applications

Charles Yount, ElMoustapha Ould-Ahmed-Vall, Kshitij A. Doshi, 2007, 2007 IEEE International Symposium on Performance Analysis of Systems & Software.

Genetic Algorithm Based Auto-Tuning of Seismic Applications on Multi and Manycore Computers

Philippe Thierry, L. Borges, C. Andreolli, 2014, HiPC 2014.

Architecture and Performance of Devito, a System for Automated Stencil Computation

Charles Yount, Felix J. Herrmann, Michael Lange, 2018, ACM Trans. Math. Softw..

Optimised finite difference computation from symbolic equations pdf

Charles Yount, Michael Lange, Gerard Gorman, 2017, SciPy.

Architecture and Performance of Devito, a System for Automated Stencil Computation

Philipp A. Witte, F. Herrmann, P. Kelly, 2018, ACM Trans. Math. Softw..

Performance Optimization of Fully Anisotropic Elastic Wave Propagation on 2nd Generation Intel® Xeon Phi(TM) Processors

Mauricio Hanzich, A. Duran, Albert Farrés, 2018, 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Multi-level spatial and temporal tiling for efficient HPC stencil computation on many-core processors with large shared caches

Alejandro Duran, Charles Yount, Josh Tobin, 2017, Future Gener. Comput. Syst..

Accelerating Seismic Simulations Using the Intel Xeon Phi Knights Landing Processor

Charles Yount, Alexander Heinecke, Josh Tobin, 2017, ISC.

YASK—Yet Another Stencil Kernel: A Framework for HPC Stencil Code-Generation and Tuning

Alejandro Duran, Charles Yount, Josh Tobin, 2016, 2016 Sixth International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC).

Effective Use of Large High-Bandwidth Memory Caches in HPC Stencil Computation via Temporal Wave-Front Tiling

Alejandro Duran, Charles Yount, A. Duran, 2016, 2016 7th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS).

Vector Folding: Improving Stencil Performance via Multi-dimensional SIMD-vector Representation

Charles Yount, Charles R. Yount, 2015, 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems.

Characterization and Optimization Methodology Applied to Stencil Computations

Philippe Thierry, L. Borges, C. Andreolli, 2015 .

A Methodology for the Rapid Injection of Transient Hardware Errors

Daniel P. Siewiorek, Charles R. Yount, D. Siewiorek, 1996, IEEE Trans. Computers.