Jan Korenek

发表

FlowContext: Flexible Platform for Multigigabit Stateful Packet Processing

Martin Kosek, Jan Korenek, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Reduction of FPGA resources for regular expression matching by relation similarity

Jan Korenek, Vlastimil Kosar, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Low-latency modular packet header parser for FPGA

Jan Korenek, Viktor Pus, Lukas Kekely, 2012, 2012 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

Online Protocol Testing for FPGA Based Fault Tolerant Systems

Jan Korenek, Martin Straka, Zdenek Kotasek, 2007 .

GICS: Generic interconnection system

Tomás Martínek, Jan Korenek, Tamas Malek, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Hardware accelerated flow measurement of 100 Gb ethernet

Jan Korenek, Viktor Pus, Petr Velan, 2015, 2015 IFIP/IEEE International Symposium on Integrated Network Management (IM).

Demonstration of Full-Duplex Packet Transfers Over PCI Express with Sustained 200 Gbps Throughput

Jan Korenek, Viktor Pus, Lukás Kekely, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications

Jan Korenek, Roland Dobai, J. Korenek, 2015, 2015 IEEE Symposium Series on Computational Intelligence.

High speed pattern matching algorithm based on deterministic finite automata with faulty transition table

Jan Korenek, Jan Kastil, 2010, 2010 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

General memory efficient packet matching FPGA architecture for future high-speed networks

Jan Korenek, Lukás Kekely, Michal Kekely, 2020, Microprocess. Microsystems.

Network monitoring probe based on Xilinx Zynq

Jan Korenek, Pavol Korcek, Jan Viktorin, 2014, 2014 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

A new embedded platform for rapid development of network applications

Jan Korenek, Vlastimil Kosar, Martin Zádník, 2012, 2012 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

Methodology for Fast Pattern Matching by Deterministic Finite Automaton with Perfect Hashing

Jan Korenek, Ondrej Lengál, Jan Kastil, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

Memory efficient IP lookup in 100 GBPS networks

Jirí Matousek, Jan Korenek, Martin Skacan, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

Towards Efficient Field Programmable Pattern Matching Array

Jan Korenek, Vlastimil Kosar, 2015, 2015 Euromicro Conference on Digital System Design.

Acceleration of Feature Extraction for Real-Time Analysis of Encrypted Network Traffic

David Novak, Jan Korenek, Roman Vrana, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Packet header analysis and field extraction for multigigabit networks

Jan Korenek, Libor Polcak, Petr Kobierský, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Packet Classification with Limited Memory Resources

Jan Korenek, Michal Kekely, 2017, 2017 Euromicro Conference on Digital System Design (DSD).

Netflow probe intended for high-speed networks

Jan Korenek, Tomas Pecenka, Martin Zádník, 2005, International Conference on Field Programmable Logic and Applications, 2005..

On NFA-split architecture optimizations

Jan Korenek, Vlastimil Kosar, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Accelerated Wire-Speed Packet Capture at 200 Gbps

Jan Korenek, Lukas Kekely, Martin Spinler, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Evaluating Reputation of Internet Entities

Jan Korenek, Václav Bartos, 2016, AIMS.

Hardware acceleration in computer networks

Jan Korenek, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Memory optimizations for packet classification algorithms in FPGA

Jan Korenek, Viktor Pus, Juraj Blaho, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Reducing memory in high-speed packet classification

Jan Korenek, Viktor Pus, 2012, 2012 8th International Wireless Communications and Mobile Computing Conference (IWCMC).

Network Probe for Flexible Flow Monitoring

Jan Korenek, Ondrej Lengál, Martin Zádník, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Evolutionary design of hash function pairs for network filters

Lukás Sekanina, Jan Korenek, Roland Dobai, 2017, Appl. Soft Comput..

Regular expression matching with pipelined delayed input DFAs for high-speed networks

Jirí Matousek, Jan Korenek, Juraj Kubis, 2018, ANCS.

Memory optimization for packet classification algorithms

Jan Korenek, Viktor Pus, Juraj Blaho, 2009, ANCS '09.

Efficient packet classification algorithm based on entropy

Jan Korenek, Michal Kajan, 2010, 2010 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

High-Speed Regular Expression Matching with Pipelined Memory-Based Automata

Jirí Matousek, Jan Korenek, Denis Matousek, 2018, 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Evolutionary circuit design for fast FPGA-based classification of network application protocols

Lukás Sekanina, Jan Korenek, Vlastimil Kosar, 2016, Appl. Soft Comput..

Design methodology of configurable high performance packet parser for FPGA

Jan Korenek, Viktor Pus, Lukas Kekely, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

High-Speed Computation of CRC Codes for FPGAs

Jan Korenek, Lukás Kekely, Jakub Cabal, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Memory Aware Packet Matching Architecture for High-Speed Networks

Jan Korenek, Lukas Kekely, Michal Kekely, 2018, 2018 21st Euromicro Conference on Digital System Design (DSD).

Netbench: Framework for Evaluation of Packet Processing Algorithms

Jan Korenek, Viktor Pus, Vlastimil Kosar, 2011, 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems.

Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGA

Jan Korenek, Vlastimil Kosar, J. Korenek, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Software Defined Monitoring of application protocols

Jan Korenek, Viktor Pus, Lukas Kekely, 2014, IEEE INFOCOM 2014 - IEEE Conference on Computer Communications.

Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs

Lukás Sekanina, Jan Korenek, L. Sekanina, 2005, ICES.

Effective FPGA Architecture for General CRC

Jan Korenek, Lukás Kekely, Jakub Cabal, 2019, ARCS.

ClassBench-ng: Recasting ClassBench after a Decade of Network Evolution

Jirí Matousek, Andrew W. Moore, Jan Korenek, 2017, 2017 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

Adaptive development of hash functions in FPGA-based network routers

Lukás Sekanina, Jan Korenek, Roland Dobai, 2016, 2016 IEEE Symposium Series on Computational Intelligence (SSCI).

NFA reduction for regular expressions matching using FPGA

Jan Korenek, Vlastimil Kosar, Martin Zádník, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

Hardware architecture for the fast pattern matching

Jan Korenek, Vlastimil Kosar, Jan Kastil, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Fast and scalable packet classification using perfect hash functions

Jan Korenek, Viktor Pus, 2009, FPGA '09.

Seek and Push: Detecting Large Traffic Aggregates in the Dataplane pdf

Diana Andreea Popescu, Andrew W. Moore, Jan Korenek, 2018, ArXiv.

Framework for fast prototyping of applications running on reconfigurable system on chip

Jan Korenek, Vlastimil Kosar, Pavol Korcek, 2013, 2013 Conference on Design and Architectures for Signal and Image Processing.

Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing

Jan Korenek, Jan Kastil, J. Korenek, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Live demonstration of FPGA based networking accelerator for 200 Gbps data transfers

Jan Korenek, Lukas Kekely, Martin Spinler, 2018, NOMS 2018 - 2018 IEEE/IFIP Network Operations and Management Symposium.

Fast lookup for dynamic packet filtering in FPGA

Jirí Matousek, Jan Korenek, Martin Zádník, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring

Jan Korenek, Pavel Benácek, Viktor Pus, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata

Jirí Matousek, Lukás Holík, Jan Korenek, 2019, 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

High-speed regular expression matching with pipelined automata

Jan Korenek, Denis Matousek, Viktor Pus, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

Intrusion Detection System Intended for Multigigabit Networks

Jan Korenek, Petr Kobierský, 2007, 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems.

A flexible technique for the automatic design of approximate string matching architectures

Tomás Martínek, Jan Korenek, Matej Lexa, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

Hardware architecture for packet classification with prefix coloring

Jan Korenek, Viktor Pus, Michal Kajan, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Line rate programmable packet processing in 100Gb networks

Jan Korenek, Pavel Benácek, Viktor Pus, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

Software Defined Monitoring of Application Protocols

Athanasios V. Vasilakos, Jan Korenek, Viktor Pus, 2016, IEEE Transactions on Computers.

Towards hardware architecture for memory efficient IPv4/IPv6 Lookup in 100 Gbps networks

Jirí Matousek, Jan Korenek, Martin Skacan, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput

Jan Korenek, Pavel Benácek, Viktor Pus, 2018, FPGA.

A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP

Lukás Sekanina, Jan Korenek, Martin Zádník, 2015, EvoApplications.

Online Protocol Testing for FPGA Based Fault Tolerant Systems

Zdenek Kotásek, Tomás Martínek, Jan Korenek, 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

Hash-based Pattern Matching for High Speed Networks

Jan Korenek, Tomas Fukac, J. Korenek, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Low latency book handling in FPGA for high frequency trading

Jan Korenek, Milan Dvorak, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Efficient mapping of nondeterministic automata to FPGA for fast regular expression matching

Jan Korenek, Vlastimil Kosar, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

NFA split architecture for fast regular expression matching

Jan Korenek, Vlastimil Kosar, 2010, 2010 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS).

Mapping of P4 match action tables to FPGA

Jan Korenek, Michal Kekely, J. Korenek, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

General IDS Acceleration for High-Speed Networks

Jan Korenek, Jan Kucera, Lukas Kekely, 2018, 2018 IEEE 36th International Conference on Computer Design (ICCD).

Packet processing on FPGA SoC with DPDK

Jan Korenek, Jan Viktorin, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

Effective hash-based IPv6 longest prefix match

Jan Korenek, Jiri Tobola, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Scalability of Hash-Based Pattern Matching for High-Speed Network Security and Monitoring

Jirí Matousek, Jan Korenek, Tomás Fukac, 2021, 2021 IEEE Symposium on Computers and Communications (ISCC).

Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis

Jan Korenek, Roman Vrána, R. Vrána, 2021, 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Increasing Memory Efficiency of Hash-Based Pattern Matching for High-Speed Networks

Jirí Matousek, Jan Korenek, Lukás Kekely, 2021, 2021 International Conference on Field-Programmable Technology (ICFPT).