Ananta K. Majhi

发表

Systematic defects in deep sub-micron technologies

Camelia Hora, Bram Kruseman, Ananta K. Majhi, 2004, 2004 International Conferce on Test.

A Novel Path Delay Fault Simulator Using Binary Logic

Lalit M. Patnaik, Ananta K. Majhi, J. Jacob, 1996 .

Lalit M. Patnaik, Ananta K. Majhi, James Jacob, 2000, IEEE Trans. Very Large Scale Integr. Syst..

An efficient automatic test generation system for path delay faults in combinational circuits

Vishwani D. Agrawal, Lalit M. Patnaik, Ananta K. Majhi, 1995, Proceedings of the 8th International Conference on VLSI Design.

Embedded multi-detect ATPG and Its Effect on the Detection of Unmodeled Defects

Friedrich Hapke, Erik Jan Marinissen, Andreas Glowatz, 2007, 2007 IEEE International Test Conference.

NIM- a noise index model to estimate delay discrepancies between silicon and simulation

Bram Kruseman, Ananta K. Majhi, Jennifer Dworak, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Modeling Power Supply Noise in Delay Testing

Guido Gronthoud, Bram Kruseman, Ananta K. Majhi, 2007, IEEE Design & Test of Computers.

Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages

Camelia Hora, Bram Kruseman, Ananta K. Majhi, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

A new algorithm for dynamic faults detection in RAMs

Guido Gronthoud, Ananta K. Majhi, Maurice Lousberg, 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

Delay fault models and coverage

Vishwani D. Agrawal, Ananta K. Majhi, 1998, Proceedings Eleventh International Conference on VLSI Design.

On hazard-free patterns for fine-delay fault testing

Guido Gronthoud, Bram Kruseman, Ananta K. Majhi, 2004, 2004 International Conferce on Test.

Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality

Camelia Hora, Bram Kruseman, Ananta K. Majhi, 2008, 2008 IEEE International Test Conference.

Memory testing under different stress conditions: an industrial evaluation

Guido Gronthoud, Ananta K. Majhi, Stefan Eichenberger, 2005, Design, Automation and Test in Europe.

Power Supply Noise in Delay Testing

Guido Gronthoud, Bram Kruseman, Ananta K. Majhi, 2006, 2006 IEEE International Test Conference.

A genetic algorithm-based circuit partitioner for MCMs

Lalit M. Patnaik, Ananta K. Majhi, Srilata Raman, 1995, Microprocess. Microprogramming.

Mixed-signal test

Vishwani D. Agrawal, Ananta K. Majhi, 1998, Proceedings Eleventh International Conference on VLSI Design.

Systematic defects in deep sub-micron technologies

C. Hora, Ananta K. Majhi, B. Kruseman, 2004 .

Improving diagnostic resolution of delay faults using path delay fault model

Camelia Hora, Guido Gronthoud, Ananta K. Majhi, 2003, Proceedings. 21st VLSI Test Symposium, 2003..

On test coverage of path delay faults

Vishwani D. Agrawal, Lalit M. Patnaik, Ananta K. Majhi, 1996, Proceedings of 9th International Conference on VLSI Design.

Efficient Grouping of Fail Chips for Volume Yield Diagnostics

V. Kamakoti, Ananta K. Majhi, Lavanya Jagan, 2009, 2009 22nd International Conference on VLSI Design.

Diagnosis of Full Open Defects in Interconnecting Lines

Camelia Hora, Bram Kruseman, Ananta K. Majhi, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

Impact of Temperature on Test Quality

V. Kamakoti, Camelia Hora, Bram Kruseman, 2010, 2010 23rd International Conference on VLSI Design.

New test methodology for resistive open defect detection in memory address decoders

Ananta K. Majhi, Mohamed Azimane, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

On Performance Testing with Path Delay Patterns

Guido Gronthoud, Bram Kruseman, Ananta K. Majhi, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

On hazard-free patterns for fine-delay fault testing

Ananta K. Majhi, G. Gronthoud, B. Kruseman, 2004 .

Automated AC (timing) characterization for digital circuit testing

Ananta K. Majhi, S. Balajee, 1998, Proceedings Eleventh International Conference on VLSI Design.

NIM-X: A Noise Index Model-Based X-Filling Technique to Overcome the Power Supply Switching Noise Effects on Path Delay Test

Bram Kruseman, Ananta K. Majhi, Jennifer Dworak, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Tutorial: Delay Fault Models and Coverage

Vishwani D. Agrawal, Ananta K. Majhi, 1998 .