Hyunchul Park

SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations

Cheng Wang, Hongbo Rong, Youfeng Wu, 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture.

Polymorphic Pipeline Array: A flexible multicore accelerator with virtualized execution for mobile multimedia applications

Scott A. Mahlke, Yongjun Park, Hyunchul Park, 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Polymorphic Pipeline Array: A Flexible Multicore Accelerator for Mobile Multimedia Applications

Hyunchul Park, Hyunchul Park, 2009 .

SIMD defragmenter: efficient ILP realization on data-parallel architectures

Scott A. Mahlke, Yongjun Park, Hyunchul Park, 2012, ASPLOS XVII.

Resource recycling: putting idle resources to work on a composable accelerator

Scott A. Mahlke, Yongjun Park, Sukjin Kim, 2010, CASES '10.

Edge-centric modulo scheduling for coarse-grained reconfigurable architectures

Scott A. Mahlke, Hong-Seok Kim, Heeseok Kim, 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

Cost sensitive modulo scheduling in a loop accelerator synthesis system

Scott A. Mahlke, Kevin Fan, Hyunchul Park, 2005, 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05).

Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures

Scott A. Mahlke, Kevin Fan, Hyunchul Park, 2006, CASES '06.