Joshua L. Kihm

Dynamic run-time architecture techniques for enabling continuous optimization

Dirk Grunwald, Tipp Moseley, Vijay Janapa Reddi, 2005, CF '05.

Predictable Fine-Grained Cache Behavior for Enhanced Simultaneous Multithreading (SMT) Scheduling

Daniel A. Connors, Joshua L. Kihm, Andrew Janiszewski, 2004 .

Statistical simulation of multithreaded architectures

Daniel A. Connors, Joshua L. Kihm, 2005, 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems.

Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors

Alex Settle, Daniel A. Connors, Joshua L. Kihm, 2005, J. Instr. Level Parallelism.

Architectural Support for Enhanced SMT Job Scheduling

Alex Settle, Daniel A. Connors, Joshua L. Kihm, 2004, IEEE PACT.

Implementation of fine-grained cache monitoring for improved SMT scheduling

Daniel A. Connors, Joshua L. Kihm, 2004, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..

Methods for modeling resource contention on simultaneous multithreading processors

Dirk Grunwald, Tipp Moseley, Daniel A. Connors, 2005, 2005 International Conference on Computer Design.

Phase-Guided Small-Sample Simulation

Daniel A. Connors, Joshua L. Kihm, Samuel D. Strom, 2007, 2007 IEEE International Symposium on Performance Analysis of Systems & Software.

Simulation and characterization of inter-process interference on multithreaded and multicore architectures

Daniel A. Connors, Joshua L. Kihm, D. Connors, 2008 .

A Mathematical Model for Accurately Balancing Co-Phase Effects in Simulated Multithreaded Systems

Tipp Moseley, Daniel A. Connors, Joshua L. Kihm, 2005 .