Zeng-Chuan Wu

The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Real-time FPGA architecture of extended linear convolution for digital image scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 International Conference on Field-Programmable Technology.

An Efficient Architecture of Extended Linear Interpolation for Image Processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2010, J. Inf. Sci. Eng..

An efficient convolution interpolation kernel for digital image scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, IEICE Electron. Express.

The VLSI Design of Winscale for Digital Image Scaling

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2007, Third International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007).

A Low-cost VLSI Design of Extended Linear Interpolation for Real Time Digital Image Processing

Ming-Hwa Sheu, Chung-Chi Lin, Huann-Keng Chiang, 2008, 2008 International Conference on Embedded Software and Systems.