H. E. Maes

Nonvolatile multilevel memories for digital applications

M. Lanzoni, Alessandro Manstretta, Bruno Ricco, 1998, Proc. IEEE.

ESD-RF co-design methodology for the state of the art RF-CMOS blocks

Michiel Steyaert, Steven Thijs, Guido Groeseneken, 2005, Microelectron. Reliab..

A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits

Michiel Steyaert, Guido Groeseneken, J.-J. Yang, 2004, Microelectron. Reliab..

High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices

Michiel Steyaert, Steven Thijs, Guido Groeseneken, 2003, Microelectron. Reliab..

Simulation of 0.35 μm/0.25 μm CMOS Technology Doping Profiles

J. Van Houdt, Luc Haspeslagh, H. E. Maes, 2001, VLSI Design.

A 5V - compatible Flash EEPROM Cell with Microsecond Programming for Embedded Memory Applications

Dirk Wellekens, J. Van Houdt, L. Haspeslagh, 1994 .

NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase

Anabela Veloso, Guido Groeseneken, Ben Kaczer, 2007, Microelectron. Reliab..