J.G. Lee

Switch Controlled Source Amplifier for Low Power Mobile TFT-LCD Driver IC

J.H. Woo, J.G. Lee, K.Y. Chung, 2007, 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM

B.J. Park, K.N. Kim, H.S. Jeong, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Highly manufacturable 90 nm DRAM technology

S.H. Hong, C.H. Cho, D.J. Lee, 2002, Digest. International Electron Devices Meeting,.

Design And Fabrication of Anautomatic Mode Controlled Vibratory Gyroscope

J.G. Lee, T. Kang, J.G. Lee, 2006, 19th IEEE International Conference on Micro Electro Mechanical Systems.

Improvement of data retention time in DRAM using recessed channel array transistors with asymmetric channel doping for 80 nm feature size and beyond

Y.J. Park, J.Y. Kim, C.H. Cho, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).