Paul M. Chau

发表

Reconfigurable processing for robust navigation and control (abstract)

Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, 1998, FPGA '98.

A Feature Extraction Application on a Reconfigurable Image Processor

Paul M. Chau, Philip P. Dang, 1998, IVCNZ.

Reconfigurable hardware mapping for accelerometer-based navigation applications

Paul M. Anderson, Jeanette F. Arrigo, Paul M. Chau, 1998, Defense, Security, and Sensing.

Parallel implementations of direction finding algorithms on networks of general purpose DSP processors

Paul M. Chau, Sati Banerjee, 1993, Integr..

Conditional probability density function estimation with sigmoidal neural networks

Amir Sarajedini, Paul M. Chau, Robert Hecht-Nielsen, 1999, IEEE Trans. Neural Networks.

The application of reconfigurable processors to MEMS calibration and signal processing in inertial navigation systems

Paul M. Chau, J. F. Arrigo, K. J. Page, 1997, 1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon.

An Extension to the Protocol1 for ncreased

Paul M. Chau, Dan Picker, Ronald D. Fellman, 1996 .

An extension to the SCI flow control protocol for increased network efficiency

Paul M. Chau, Dan Picker, Ronald D. Fellman, 1996, TNET.

CUSP: A 2-/spl mu/m CMOS Digital Signal Processor

Paul M. Chau, Walter H. Ku, R. W. Linderman, 1985 .

VLSI for a Physical Model of Musical Instruments Oscillations

Paul M. Chau, David Rivas, Steven S. Watkins, 1989, ICMC.

Power aware attitude computation during rapid rotational motion

Jeanette F. Arrigo, Paul M. Chau, P. Chau, 2006, IEEE Transactions on Instrumentation and Measurement.

Reconfigurable-hardware-based digital signal processing for wireless communications

Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, 1997, Optics & Photonics.

Quaternion-Based Attitude Update Calculations Using the Cordic Algorithm

Jeanette F. Arrigo, Paul M. Chau, 2001 .

Execution of a remote sensing application on a custom neurocomputer

Paul M. Chau, Raoul Tawel, Bjorn H. Lambrigsten, 1995, IEEE Trans. Neural Networks.

Blind signal separation with a projection pursuit index

Amir Sarajedini, Paul M. Chau, P. Chau, 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

Reconfigurable parallel processor for noise suppression

Paul M. Chau, Philip P. Dang, Michael Cuviello, 1999, Medical Imaging.

A neural network architecture for the decoding of long constraint length convolutional codes

Paul M. Chau, Michael D. Alston, 1990, 1990 IJCNN International Joint Conference on Neural Networks.

Microarchitectural synthesis of performance-constrained, low-power VLSI designs

Alex Orailoglu, Paul M. Chau, Laurence Goodby, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

A wire length estimation technique utilizing neighborhood density equations

Chung-Kuan Cheng, Paul M. Chau, Takeo Hamada, 1992, DAC '92.

Improved scheduling of signal flow graphs onto multiprocessor systems through an accurate network modelling technique

Paul M. Chau, S. Banerjee, D. Picker, 1994, Proceedings of 1994 IEEE Workshop on VLSI Signal Processing.

An Analog VLSI Neural Network Cocktail Party Processor

Alan Heirich, Paul M. Chau, Steven S. Watkins, 1991 .

Hierarchical modeling of the VLSI design process

Alex Orailoglu, Paul M. Chau, Amir Hekmatpour, 1991, IEEE Expert.

Low-Level Sinusoidal Signal Detection From a High-Resolution Virtual Spectral Image Using Autoregressive Vector Extrapolation

Paul M. Chau, Cláudio S. Marino, 2012, IEEE Transactions on Instrumentation and Measurement.

Image encryption for secure Internet multimedia applications

Paul M. Chau, Philip P. Dang, P. P. Dang, 2000, 2000 Digest of Technical Papers. International Conference on Consumer Electronics. Nineteenth in the Series (Cat. No.00CH37102).

A technique for realizing linear phase IIR filters

Paul M. Chau, Scott R. Powell, S. Powell, 1991, IEEE Trans. Signal Process..

Enhancing SCI's fairness protocol for increased throughput

Paul M. Chau, Dan Picker, Ronald D. Fellman, 1993, 1993 International Conference on Network Protocols.

Test synthesis and self-test in high-performance vlsi digital signal processing

Paul M. Chau, Alex Orailoglu, James Laurence Goodby, 1997 .

Configurable hardware for image segmentation

Paul M. Chau, Philip P. Dang, Scott Burdette Anderson, 1999, Electronic Imaging.

Integer fast wavelet transform and its VLSI implementation for low power applications

Paul M. Chau, P. P. Dang, 2002, IEEE Workshop on Signal Processing Systems.

Objective Human Visual System Based Video Quality Assessment Metric for Low Bit-Rate Video Communication Systems

Paul M. Chau, David Chih-Che Lin, 2006, 2006 IEEE Workshop on Multimedia Signal Processing.

Vlsi Signal Processing II

Paul M. Chau, Jan Rabaey, John Eldon, 1986 .

Reduced-complexity circuit for neural networks

Paul M. Chau, Steven S. Watkins, 1995 .

A Hybrid Radial Basis Function Neurocomputer and Its Applications

Paul M. Chau, Mark Plutowski, Raoul Tawel, 1993, NIPS.

Adaptive FEC on a reconfigurable processor for wireless multimedia communications

Paul M. Chau, J. F. Arrigo, K. J. Page, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Rapid prototyping methodology for multiprocessor implementation of digital signal processing systems

Paul M. Chau, Sati Banerjee, Ronald D. Fellman, 1995, J. VLSI Signal Process..

Constrained Sensor System Resolves Closely Spaced Obscured Low-SNR Sources Using Virtual Beamforming

Paul M. Chau, Cláudio S. Marino, P. Chau, 2014, IEEE Transactions on Instrumentation and Measurement.

Rapid Prototyping of ASIC Based System

Kevin J. Page, Paul M. Chau, P. H. Kelly, 1994, 31st Design Automation Conference.

Neural network processing to minimize quantization losses

Paul M. Chau, Yu-Jhih Wu, 1993, Optics & Photonics.

VLSI Implementation Of The Fast Fourier Transform

Paul M. Chau, Walter H. Ku, P. Chau, 1986, Optics & Photonics.

Implementation of the IDEA algorithm for image encryption

Paul M. Chau, Philip P. Dang, P. P. Dang, 2000, SPIE Optics + Photonics.

Reduce complexity hardware implementation of discrete wavelet transform for JPEG 2000 standard

Paul M. Chau, Philip P. Dang, 2002, Proceedings. IEEE International Conference on Multimedia and Expo.

Efficient implementation of digital signal processing algorithms on high performance multiprocessor systems

Paul M. Chau, Sati Banerjee, 1994 .

Reconfigurable Hardware for Encryption

Paul M. Chau, Philip P. Dang, Jeremy Risher, 1999, Applied Informatics.

Implementation of adaptive beamforming algorithms on parallel processing DSP networks

Paul M. Chau, Sati Banerjee, 1992, Optics & Photonics.

Implementing the Viterbi algorithm on general-purpose parallel computers

Paul M. Chau, Kar-Ming Cheung, Michael D. Alston, 1992, Optics & Photonics.

Robust image transmission over CDMA channels

Paul M. Chau, Philip P. Dang, 2000, 2000 Digest of Technical Papers. International Conference on Consumer Electronics. Nineteenth in the Series (Cat. No.00CH37102).

Recursive least squares problem implementation on a generalized interconnection of DSP processors

Paul M. Chau, Sati Banerjee, 1993, 1993 IEEE International Conference on Acoustics, Speech, and Signal Processing.

KINFIDA: an object-oriented model-based digital filter design assistant

Paul M. Chau, Amir Hekmatpour, Scott R. Powell, 1990, International Conference on Acoustics, Speech, and Signal Processing.

A radial basis function neurocomputer implemented with analog VLSI circuits

Paul M. Chau, R. Tawel, S. S. Watkins, 1992, [Proceedings 1992] IJCNN International Joint Conference on Neural Networks.

Performance analysis of image transmission over wireless communication channels

Paul M. Chau, Philip P. Dang, Benjamin L. Ochoa, 2000, Electronic Imaging.

Design of low-power lifting-based coprocessor for mobile multimedia applications

Paul M. Chau, Philip P. Dang, P. Chau, 2003, IS&T/SPIE Electronic Imaging.

Improved vlsi architecture for attitude determination computations

Jeanette F. Arrigo, Paul M. Chau, 2006 .

Microarchitectural synthesis of performance-constrained, low-power VLSI designs

Alex Orailoglu, Paul M. Chau, Laurence Goodby, 2002, TODE.

Hardware/software implementation 3-way algorithm for image encryption

Paul M. Chau, Philip P. Dang, 2000, Electronic Imaging.

A 1.2 GHz CMOS quadrature self-oscillating mixer

Paul M. Chau, Michael B. Bendak, Baernard A. Xavier, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

High-resolution imaging using virtual sensors from 2-D autoregressive vector extrapolation

Paul M. Chau, Claudio S. Marino, 2011, 2011 IEEE Sensors Applications Symposium.

Image encryption for multimedia applications

Paul M. Chau, Philip P. Dang, 2000, Computers and Their Applications.

Prime: A Timing-Driven Placement Tool Using A Piecewise Linear Resistive Network Approach

Chung-Kuan Cheng, Paul M. Chau, Takeo Hamada, 1993, 30th ACM/IEEE Design Automation Conference.

A high performance, low power VLSI design of discrete wavelet transform for lossless compression in JPEG 2000 standard

Paul M. Chau, P. P. Dang, 2001, ICCE. International Conference on Consumer Electronics (IEEE Cat. No.01CH37182).

Discrete wavelet transform for image compression: a hardware approach

Paul M. Chau, Philip P. Dang, 1999, Medical Imaging.

Folding large regular computational graphs onto smaller processor arrays

Kevin J. Page, Paul M. Chau, 1996, Optics & Photonics.

AI techniques and object-oriented technology for VLSI design-space representation, optimization, and management

Paul M. Chau, Amir Hekmatpour, 1990, Defense, Security, and Sensing.

A Novel 2-D DOA estimation algorithm with superior resolution and reduced sidelobes

Paul M. Chau, Claudio S. Marino, 2005, SPIE Optics + Photonics.

Fast blind signal separation for multiuser interference rejection in smart antenna arrays

Amir Sarajedini, Paul M. Chau, 1997, Optics & Photonics.

A HIGH PERFORMANCE BIT-SERIAL VLSI PROCESSOR

Paul M. Chau, Richard W. Linderman, Peter P. Reusens, 1984 .

Evolvable Hardware Control for Dynamic Reconfigurable and Adaptive Computing

Paul M. Chau, Anthony V. Sebald, Gerald Clark, 1998, Evolutionary Programming.

FPGA architecture for noise filters on a reconfigurable processor

Paul M. Chau, Philip P. Dang, 1999, Computers and Their Applications.

Reconfigurable Adaptive Interface Nulling (RAIN) satellite architecture

Paul M. Chau, Claudio S. Marino, 1999 .

An adaptive soft-decision quantizer for digital communications with convolutional coding on a Rayleigh fading channel

Paul M. Chau, Yu-Jhih Wu, 1993, Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan).

AN OPTO-ELECTRONIC VITERBI TRACEBACK PROCESSOR FOR

Paul M. Chau, Michael D. Alston, 1990 .

Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor

Paul M. Chau, Walter H. Ku, Richard W. Linderman, 1984, ICASSP.

Macro pipelining based scheduling on high performance heterogeneous multiprocessor systems

Paul M. Chau, Takeo Hamada, Sati Banerjee, 1995, IEEE Trans. Signal Process..

BinDCT and its efficient VLSI architectures for real-time embedded applications

Truong Q. Nguyen, Trac D. Tran, Paul M. Chau, 2005 .

Hardware/software design implementation of feature detection for a reconfigurable processor

Paul M. Chau, Philip P. Dang, 1998, Electronic Imaging.

A high-level synthesis methodology for low-power VLSI design

Paul M. Chau, L. Goodby, A. Orailoglu, 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.

Reduced complexity FPGA-based digital signal processing for adaptive beamforming

Paul M. Chau, A. Sarajedini, C. S. Marino, 1998, 1998 IEEE International Joint Conference on Neural Networks Proceedings. IEEE World Congress on Computational Intelligence (Cat. No.98CH36227).