Tetsuro Takizawa

An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder

Tetsuro Takizawa, Masao Hirasawa, 2001, IEEE Trans. Consumer Electron..

High performance and cost effective memory architecture for an HDTV decoder LSI

Tetsuro Takizawa, Hidenobu Harasaki, Junji Tajime, 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).

Memory compression method considering memory bandwidth for HDTV decoder LSIs

Tetsuro Takizawa, Hidenobu Harasaki, Satoshi Nogaki, 1999, Proceedings 1999 International Conference on Image Processing (Cat. 99CH36348).