Haruo Kobayashi

发表

A Distortion Shaping Technique to Equalize Intermodulation Distortion Performance of Interpolating Arbitrary Waveform Generators in Automated Test Equipment

Peter Sarson, Tomonori Yanagida, Shohei Shibuya, 2018, J. Electron. Test..

I,Q-Residue Pipelined ADC Architecture

Nobukazu Takai, Haruo Kobayashi, Yohei Tan, 2010 .

Noise-Shaping Cyclic ADC Architecture

Yu Liu, Haruo Kobayashi, Yukiko Arai, 2015 .

ADC linearity test signal generation algorithm

Takahiro J. Yamaguchi, Satoshi Ito, Kiichi Niitsu, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Pulse Coding Control Switching Converter with Adjustable Conversion Voltage Ratio Notch Frequency Generation in Noise Spectrum

Haruo Kobayashi, Yasunori Kobori, Yifei Sun, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Digitally-controlled Gm-C bandpass filter

Hao Chen, Khayrollah Hadidi, Kiichi Niitsu, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Timing measurement BOST with multi-bit delta-sigma TDC

Shohei Shibuya, Haruo Kobayashi, Daiki Hirabayashi, 2015, 2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW).

Erratum to: A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator

Haruo Kobayashi, Kentaroh Katoh, Takeshi Chujo, 2015, J. Electron. Test..

Timing measurement BOST architecture with full digital circuit and self-calibration using characteristics variation positively for fine time resolution

Haruo Kobayashi, Ryoji Shiota, Junshan Wang, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

A New Self-Heat Modeling Approach for LDMOS Devices

Haruo Kobayashi, Hitoshi Aoki, 2015 .

A Practical Analog BIST Cooperated with an LSI Tester

Haruo Kobayashi, Takanori Komuro, Naoto Hayasaka, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme

Satoshi Ito, Haruo Kobayashi, Yohei Tan, 2011, IEICE Trans. Electron..

A clock jitter reduction circuit using gated phase blending between self-delayed clock edges

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, 2012 Symposium on VLSI Circuits (VLSIC).

Optimization and analysis of high reliability 30–50V dual RESURF LDMOS

Jun-ichi Matsuda, Haruo Kobayashi, Jun-ya Kojima, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Graphene Biosensor for Saliva Protein Adsorption

Shiyu Wang, Haruo Kobayashi, Anna Kuwana, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

High-Resolution Low-Sampling-Rate Δ∑ ADC Linearity Short-Time Testing Algorithm

Haruo Kobayashi, Anna Kuwana, Jiang-Lin Wei, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationships

Haruo Kobayashi, Isao Shimizu, Hitoshi Aoki, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Reducing spurious output of balanced modulators by dynamic matching of I, Q quadrature paths

Haruo Kobayashi, Hao San, Yoshihisa Yamada, 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

SFDR Improvement Algorithms for Current-Steering DACs

S. N. Mohyar, Haruo Kobayashi, Tatsuji Matsuura, 2015 .

Self-Calibration Techniques of Pipeline ADCs Using Cyclic Configuration

Li Quan, Yu Liu, Kiichi Niitsu, 2013 .

Finite aperture time effects in sampling circuit

Kiichi Niitsu, Shohei Shibuya, Haruo Kobayashi, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Activation Modeling and Classification of Voluntary and Imagery Movements From the Prefrontal fNIRS Signals

Mohiuddin Ahmad, Haruo Kobayashi, Anna Kuwana, 2020, IEEE Access.

Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2011, IEEE Asian Solid-State Circuits Conference 2011.

A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI

Haruo Kobayashi, Takanori Komuro, Naoto Hayasaka, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, 17th Asia and South Pacific Design Automation Conference.

Minimum Output Ripple and Fixed Operating Frequency Based on Modulation Injection for COT Ripple Control Converter

Haruo Kobayashi, Yasunori Kobori, Yifei Sun, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Study of multistage digital oscilloscope trigger circuit

Haruo Kobayashi, Yasunori Kobori, Takashi Ida, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Time-to-Digital-Converter with small circuitry

Kazuya Shimizu, Nobukazu Takai, Haruo Kobayashi, 2009, 2009 Asia and South Pacific Design Automation Conference.

Transient Response Improvement of DC-DC Buck Converter by a Slope Adjustable Triangular Wave Generator

Shu Wu, Haruo Kobayashi, Yasunori Kobori, 2015, IEICE Trans. Commun..

Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity

Haruo Kobayashi, Koji Asami, Takahide Suzuki, 2009 .

Complex bandpass ΔΣAD modulator with noise-coupled image rejection

Haruo Kobayashi, Hao San, 2009, 2009 52nd IEEE International Midwest Symposium on Circuits and Systems.

A Quasi-Coherent Sampling Method for Wideband Data Acquisition

Kensuke Kobayashi, Haruo Kobayashi, Masaru Kimura, 2000, 56th ARFTG Conference Digest.

Timing skew compensation technique using digital filter with novel linear phase condition

Haruo Kobayashi, Tsuyoshi Kurosawa, Hiroyuki Miyajima, 2010, 2010 IEEE International Test Conference.

Multi-bit sigma-delta TDC architecture with self-calibration

Takahiro J. Yamaguchi, Kiichi Niitsu, Nobukazu Takai, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

BEHAVIOR OF PILED RAFT FOUNDATIONS OBTAINED FROM IN-SITU HORIZONTAL LOADING TESTS ON DOWNSIZED FOUNDATIONS

Haruo Kobayashi, Fumio Kuwabara, Toru Watanabe, 2002 .

SAR ADC algorithm with redundancy

Nobukazu Takai, Haruo Kobayashi, Hao San, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

SAR TDC Architecture with Self-Calibration Employing Trigger Circuit

Haruo Kobayashi, Takashi Ida, Ryoji Shiota, 2017, 2017 IEEE 26th Asian Test Symposium (ATS).

Digitally-Assisted Compensation Technique for Timing Skew in ATE Systems

Haruo Kobayashi, Tsuyoshi Kurosawa, Hiroyuki Miyajima, 2011, 2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop.

Simple reference current source insensitive to power supply voltage variation - improved Minoru Nagata current source

Haruo Kobayashi, Nobukazu Tsukiji, Mayu Hirano, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Wideband and Large Dynamic Range Sampling Method

Haruo Kobayashi, Tsutomu Tobari, Masafumi Uemori, 2007 .

2012 JETTA Reviewers

Luigi Carro, Fernando Morgado Dias, Irith Pomeranz, 2013, J. Electron. Test..

Flat Pass-Band Method with Two RC Band-Stop Filters for 4-Stage Passive RC Polyphase Filter in Low-IF Receiver Systems

Haruo Kobayashi, Minh Tri Tran, Anna Kuwana, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control

Feng Zhao, Hong Gao, Kiichi Niitsu, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Non-binary SAR ADC with digital error correction for low power applications

Nobukazu Takai, Toshihiko Mori, Haruo Kobayashi, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Successive approximation time-to-digital converter with vernier-level resolution

Kazumi Hatayama, Haruo Kobayashi, Ryoji Shiota, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

Redundant SAR ADC Algorithm Based on Fibonacci Sequence

Haruo Kobayashi, Yutaro Kobayashi, 2016 .

Rectangular Waveform Generation with Harmonics Suppression

Tomonori Yanagida, Shohei Shibuya, Haruo Kobayashi, 2016, 2016 IEEE 25th Asian Test Symposium (ATS).

A Study on Loop Gain Measurement Method Using Output Impedance in DC-DC Buck Converter

Haruo Kobayashi, Yasunori Kobori, Nobukazu Tsukiji, 2018, IEICE Trans. Commun..

DAC linearity improvement algorithm with unit cell sorting based on magic square

Haruo Kobayashi, Shaiful Nizam Mohyar, Masashi Higashino, 2016, 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

SAR ADC Architecture with Digital Error Correction

Nobukazu Takai, Toshihiko Mori, Haruo Kobayashi, 2010 .

Two-Tone Signal Generation for ADC Testing

Kiichi Niitsu, Haruo Kobayashi, Osamu Kobayashi, 2013, IEICE Trans. Electron..

DAC linearity improvement with layout technique using magic and latin squares

Tomonori Yanagida, Haruo Kobayashi, Takuya Arafune, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

A gray code based time-to-digital converter architecture and its FPGA implementation

Haruo Kobayashi, Congbing Li, 2015, 2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT).

A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator

Haruo Kobayashi, Kentaroh Katoh, Takeshi Chujo, 2014, J. Electron. Test..

Spatial and temporal stability of vision chips including parasitic inductances and capacitances

Takashi Matsumoto, Haruo Kobayashi, H. Kobayashi, 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

Low-Distortion Signal Generation for Analog/Mixed-Signal IC Testing Using Digital ATE Output Pin and BOST

Tomonori Yanagida, Shohei Shibuya, Kosuke Machida, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A CMOS PWM Transceiver Using Self-Referenced Edge Detection

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fibonacci sequence weighted SAR ADC as golden section search

Shohei Shibuya, Haruo Kobayashi, Takuya Arafune, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Noise-Coupled ΔΣAD Modulator with Shared OP-Amp

Haruo Kobayashi, Hao San, Haijun Lin, 2009 .

Study of jitter generators for high-speed I/O interface jitter tolerance testing

Haruo Kobayashi, Takuya Arafune, Ryoji Shiota, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Single inductor dual output switching converter using exclusive control method

Feng Zhao, Nobukazu Takai, Takahiro Odaguchi, 2013, 4th International Conference on Power Engineering, Energy and Electrical Drives.

Two-dimensional spatio-temporal dynamics of analog image processing neural networks

Takashi Matsumoto, Haruo Kobayashi, Jun Sanekata, 1995, IEEE Trans. Neural Networks.

A Residue Number System Based Time-to-Digital Converter Architecture and its FPGA Implementation

Haruo Kobayashi, Cong Bing Li, 2016 .

A New Procedure for Measuring High-Accuracy Probability Density Functions

Kunihiro Asada, Takahiro J. Yamaguchi, Kiichi Niitsu, 2012, 2012 IEEE 21st Asian Test Symposium.

SAR TDC architecture for one-shot timing measurement with full digital implementation

Haruo Kobayashi, Takashi Ida, Ryoji Shiota, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Single inductor DC-DC converter with bipolar outputs using charge pump

Kenji Takahashi, Nobukazu Takai, Hajime Yokoo, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Time-to-Digital Converter Architectures Using Two Oscillators with Different Frequencies

Kosuke Machida, Haruo Kobayashi, Uni Ozawa, 2018, 2018 IEEE 27th Asian Test Symposium (ATS).

Fibonacci sequence weighted SAR ADC algorithm and its DAC topology

Shohei Shibuya, Haruo Kobayashi, Takuya Arafune, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance

Haruo Kobayashi, Anna Kuwana, Jun-Ichi Matsuda, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Vision chip architecture with light adaptation mechanism

Tetsuya Yagi, Takashi Matsumoto, Haruo Kobayashi, 2006, Artificial Life and Robotics.

Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator

Hiroshi Yoshida, Feng Xu, Haruo Kobayashi, 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

EMI Reduction by Spread-Spectrum Clocking in Digitally-Controlled DC-DC Converters

Nobukazu Takai, Haruo Kobayashi, Yoshihisa Yamada, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Single-inductor dual-output soft-switching converter with voltage-mode resonant switch

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS

Haruo Kobayashi, Hao San, Akira Hayakawa, 2007, ASP-DAC.

Dynamic performance improvement of DC-DC buck converter by slope adjustable triangular wave generator

Haruo Kobayashi, Yasunori Kobori, Shu Wu, 2014, 2014 International SoC Design Conference (ISOCC).

Linearity enhancement algorithms for I-Q signal generation — DWA and self-calibration techniques

Haruo Kobayashi, Osamu Kobayashi, Takahiro Miki, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE

Tomonori Yanagida, Shohei Shibuya, Haruo Kobayashi, 2017, 2017 International Test Conference in Asia (ITC-Asia).

Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator

Haruo Kobayashi, Hao San, 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

An analysis of the stress of the elderly with dementia in day-care

Haruo Kobayashi, Atsuko Yuasa, Tetsuya Tanioka, 2011, 2011 7th International Conference on Natural Language Processing and Knowledge Engineering.

Estimation of circuit component values in buck converter using efficiency curve

Haruo Kobayashi, Yasunori Kobori, Nobukazu Tsukiji, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

SAR ADC design using Golden ratio weight algorithm

Shohei Shibuya, Haruo Kobayashi, Takuya Arafune, 2015, 2015 15th International Symposium on Communications and Information Technologies (ISCIT).

High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC

Toshiro Tsukada, Haruo Kobayashi, Koichiro Mashiko, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Design of Analog Filter Using Genetic Algorithm

Nobukazu Takai, Haruo Kobayashi, Naoki Arai, 2013 .

Gray-code input DAC architecture for clean signal generation

Haruo Kobayashi, Gopal Adhikari, Ryoji Shiota, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Analysis and Evaluation Method of RC Polyphase Filter

Haruo Kobayashi, Minh Tri Tran, Anna Kuwana, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Innovative practices on test in Japan

Yoichi Maeda, Kazumi Hatayama, Haruo Kobayashi, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Stochastic TDC Architecture with Self-Calibration and its RTL Verification

Haruo Kobayashi, Ryoji Shiota, Congbing Li, 2017 .

An active resistor network for Gaussian filtering of images

J. L. White, Asad A. Abidi, Haruo Kobayashi, 1991 .

Self-heat modeling of multi-finger n-MOSFETs for RF-CMOS applications

Haruo Kobayashi, Hitoshi Aoki, 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity

Takahiro J. Yamaguchi, Kiichi Niitsu, Nobukazu Takai, 2013, J. Electron. Test..

Multitone Curve-Fitting Algorithms for Communication Application ADC Testing

Haruo Kobayashi, Takanori Komuro, Hiroshi Sakayori, 2003 .

Functions required for walking supporting devices to improve the level of elderly people's quality of life in Japan

Sumiko Yamamoto, Haruo Kobayashi, Tetsuya Tanioka, 2007 .

SAR ADC that is configurable to optimize yield

Takahiro J. Yamaguchi, Satoshi Ito, Kiichi Niitsu, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

SAR ADC Algorithm with Redundancy and Digital Error Correction

Nobukazu Takai, Toshihiko Mori, Haruo Kobayashi, 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Multi-Phase Full/Half Wave Type Resonant Converters with Automatic Current Balance against Element Variation

Haruo Kobayashi, Yasunori Kobori, Anna Kuwana, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Limit cycle suppression technique using digital dither in delta sigma DA modulator

Haruo Kobayashi, Yukiko Arai, Jun-ya Kojima, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Program Committee

Michael S. Hsiao, Irith Pomeranz, Nur A. Touba, 2006, WOWMOM.

A low-offset cascaded time amplifier with reconfigurable inter-stage connection

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2014, IEICE Electron. Express.

Analog / mixed-signal circuit design based on mathematics

Haruo Kobayashi, Haijun Lin, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, IEEE Journal of Solid-State Circuits.

Cross-Noise-Coupled Architecture of Complex Bandpass ΔΣAD Modulator

Haruo Kobayashi, Hao San, 2009 .

Analysis and design of operational amplifier stability based on Routh-Hurwitz method

Haruo Kobayashi, Gopal Adhikari, Nobukazu Tsukiji, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Digital calibration algorithm for half-unary current-steering DAC for linearity improvement

Haruo Kobayashi, Shaiful Nizam Mohyar, 2014, 2014 International SoC Design Conference (ISOCC).

ΔΣAD modulator for low power application

Hiroshi Yoshida, Haruo Kobayashi, Hao San, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Two-Tone Signal Generation for Communication Application ADC Testing

Kiichi Niitsu, Haruo Kobayashi, Osamu Kobayashi, 2012, 2012 IEEE 21st Asian Test Symposium.

Analog / Mixed-Signal / RF Circuits for Complex Signal Processing

Haruo Kobayashi, Hao San, Minh Tri Tran, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Constant on-time controlled four-phase buck converter via two ways of saw-tooth-wave circuit and PLL circuit

Yi Xiong, Haruo Kobayashi, Yasunori Kobori, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Digital Compensation for Timing Mismatches in Interleaved ADCs

Haruo Kobayashi, Minghui Wu, Isao Shimizu, 2013, 2013 22nd Asian Test Symposium.

Effectiveness of the integration of different types of quantitative and qualitative assessment indicators for the patients with ischemic heart disease who underwent percutaneous coronary intervention (PCI)

Haruo Kobayashi, Tetsuya Tanioka, Yuko Yasuhara, 2011, 2011 7th International Conference on Natural Language Processing and Knowledge Engineering.

EMI reduction by analog noise spread spectrum in new ripple controlled converter

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Low-Distortion Sinewave Generation Method Using Arbitrary Waveform Generator

Kiichi Niitsu, Haruo Kobayashi, Osamu Kobayashi, 2012, J. Electron. Test..

Derivation of loop gain from output impedances in DC-DC buck converter

Haruo Kobayashi, Yasunori Kobori, Nobukazu Tsukiji, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Vision Chip [I] : Analog Image-Processing Neuro Chip

Takashi Matsumoto, Haruo Kobayashi, Tetsuya Yagi, 1993 .

Post-Silicon Jitter Measurements

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, 2012 IEEE 21st Asian Test Symposium.

擬似白銀比を用いた逐次比較近似AD変換器冗長アルゴリズム設計;擬似白銀比を用いた逐次比較近似AD変換器冗長アルゴリズム設計;SAR ADC Algorithm With Redundancy Using Pseudo-Silver-Ratio

Shohei Shibuya, Haruo Kobayashi, Takuya Arafune, 2017 .

Single inductor dual output DC-DC converter design with exclusive control

Feng Zhao, Shu Wu, Kiichi Niitsu, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Phase noise measurement techniques using delta-sigma TDC

Kiichi Niitsu, Haruo Kobayashi, Osamu Kobayashi, 2014, 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings.

A layered architecture for regularization vision chips

T. Yagi, Takashi Matsumoto, Haruo Kobayashi, 1991, [Proceedings] 1991 IEEE International Joint Conference on Neural Networks.

Sine signal generation with specified multiple harmonics suppression

Tomonori Yanagida, Shohei Shibuya, Haruo Kobayashi, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

An element rotation algorithm for multi-bit DAC nonlinearities in complex bandpass /spl Delta//spl Sigma/AD modulators

Haruo Kobayashi, Hao San, Shinya Kawakami, 2004, 17th International Conference on VLSI Design. Proceedings..

Two-phase soft-switching DC-DC converter with voltage-mode resonant switch

Yi Xiong, Haruo Kobayashi, Yasunori Kobori, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Evaluation of Null Method for Operational Amplifier Short-Time Testing

Kosuke Machida, Haruo Kobayashi, Anna Kuwana, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Unified Methodology of Analog/Mixed-Signal IC Design Based on Number Theory

Haruo Kobayashi, Anna Kuwana, Yuto Sasaki, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Highly Efficient Waveform Acquisition Condition in Equivalent-Time Sampling System

Yujie Zhao, Haruo Kobayashi, Anna Kuwana, 2018, 2018 IEEE 27th Asian Test Symposium (ATS).

Automatic Correction of Current Imbalance for Multi-Phase COT Ripple-Based Control DC-DC Converter

Jing Li, Haruo Kobayashi, Yasunori Kobori, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Automatic design of operational amplifier by combination method of function block

Nobukazu Takai, Haruo Kobayashi, Kento Suzuki, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

2015 JETTA Reviewers

Robert Wille, Yong-Bin Kim, Alexandre M. Amory, 2016, Journal of electronic testing.

Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors

Haruo Kobayashi, Hitoshi Aoki, Nobukazu Tsukiji, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Design for Testability That Reduces Linearity Testing Time of SAR ADCs

Takahiro J. Yamaguchi, Satoshi Ito, Kiichi Niitsu, 2011, IEICE Trans. Electron..

Light-adaptive architectures for regularization vision chips

Tetsuya Yagi, Takashi Matsumoto, Haruo Kobayashi, 1995, Neural Networks.

Time-to-digital converter architecture with residue arithmetic and its FPGA implementation

Haruo Kobayashi, Kentaroh Katoh, Junshan Wang, 2014, 2014 International SoC Design Conference (ISOCC).

Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Accurate Testing of Precision Voltage Reference by DC-AC Conversion

Haruo Kobayashi, Anna Kuwana, Takashi Ishida, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

Frequency Estimation Sampling Circuit Using Analog Hilbert Filter and Residue Number System

Haruo Kobayashi, Anna Kuwana, Congbing Li, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Integral-type Time-to-Digital Converter

Haruo Kobayashi, Yuto Sasaki, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Stochastic TDC architecture with self-calibration

Takahiro J. Yamaguchi, Satoshi Ito, Kiichi Niitsu, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Analysis of coupled inductors for low-ripple fast-response buck converter

Haruo Kobayashi, Yasunori Kobori, Zhang Ting, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Low-distortion signal generation for ADC testing

Kenji Sawada, Haruo Kobayashi, Osamu Kobayashi, 2014, 2014 International Test Conference.

Self-Heat Characterizations and Modeling of Multifinger nMOSFETs for RF-CMOS Applications

Haruo Kobayashi, Hitoshi Aoki, 2015, IEEE Transactions on Electron Devices.

Systematic Construction of Resistor Ladder Network for N-ary DACs

Haruo Kobayashi, Anna Kuwana, Shuhei Yamamoto, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Design methodology for determining the number of stages in a cascaded time amplifier to minimize area consumption

Kiichi Niitsu, Haruo Kobayashi, Naohiro Harigai, 2013, IEICE Electron. Express.

Flat passband gain design algorithm for 2nd-order RC polyphase filter

Jian Kang, Haruo Kobayashi, Takashi Kitahara, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Summing Node Test Method: Simultaneous Multiple AC Characteristics Testing of Multiple Operational Amplifiers

Haruo Kobayashi, Anna Kuwana, Takashi Ishida, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

Image processing regularization filters on layered architecture

Tetsuya Yagi, Takashi Matsumoto, Haruo Kobayashi, 1993, Neural Networks.

Noise-Coupled Image Rejection Architecture of Complex Bandpass ΔΣAD Modulator

Haruo Kobayashi, Hao San, 2010 .

Automatic Synthesis of Comparator Circuit Using Genetic Algorithm and SPICE Optimizing Function

Nobukazu Takai, Haruo Kobayashi, Hiroaki Seki, 2015 .

A New Coherent Sampling System with a Triggered Time Interpolation

Kensuke Kobayashi, Haruo Kobayashi, Masaru Kimura, 2001 .

Error correction algorithm for folding/interpolation ADC

Hiroyuki Matsuura, Haruo Kobayashi, Tsutomu Tobari, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators

Satoshi Ito, Nobukazu Takai, Haruo Kobayashi, 2013, 2013 22nd Asian Test Symposium.

Analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2011, 2011 International SoC Design Conference.

Overshoot Cancelation Based on Balanced Charge-Discharge Time Condition for Buck Converter in Mobile Applications

Haruo Kobayashi, Yasunori Kobori, Yifei Sun, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure

Satoshi Ito, Haruo Kobayashi, Yohei Tan, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

High-resolution DPWM generator for digitally controlled DC-DC converters

Kazuya Shimizu, Haruo Kobayashi, Yasunori Kobori, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Total Harmonic Distortion Measurement System of Electronic Devices up to 100 MHz With Remarkable Sensitivity

Haruo Kobayashi, Takanori Komuro, Hiroshi Sakayori, 2007, IEEE Transactions on Instrumentation and Measurement.

A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs

Haruo Kobayashi, Hitoshi Aoki, Nobukazu Tsukiji, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Comparator circuit automation by combination of game tree search and partial optimization

Nobukazu Takai, Haruo Kobayashi, Kento Suzuki, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Using Distortion Shaping Technique to Equalize ADC THD Performance Between ATEs

Peter Sarson, Haruo Kobayashi, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

High-frequency low-distortion signal generation algorithm with arbitrary waveform generator

Shohei Shibuya, Haruo Kobayashi, Yutaro Kobayashi, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Fine Time Resolution TDC Architectures -Integral and Delta-Sigma Types

Kosuke Machida, Haruo Kobayashi, Pengfei Zhang, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity

Haruo Kobayashi, Hidetaka Suzuki, Hiroyuki Miyajima, 2008, 2008 17th Asian Test Symposium.

C-12-46 ADC Test Signal Generation Algorithm for Mixed-Signal SoC

Haruo Kobayashi, Satoshi Uemori, Satoshi Ito, 2010 .

EMI Noise Reduction and Output Ripple Cancellation for Full-Wave Type Soft-Switching Converter

Haruo Kobayashi, Yasunori Kobori, Yifei Sun, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Silicon Verification of Improved Nagata Current Mirrors

Haruo Kobayashi, Takashi Ida, Nobukazu Tsukiji, 2018, IEEE International Conference on Solid-State and Integrated Circuit Technology.

Fundamental design consideration of sampling circuit

Kensuke Kobayashi, Haruo Kobayashi, Keita Kurihara, 2016, 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

Finite Aperture Time and Sampling Jitter Effects in Wideband Data Acquisition Systems

Kensuke Kobayashi, Haruo Kobayashi, Masanao Morimura, 2000, 56th ARFTG Conference Digest.

Spatial versus temporal stability issues in image processing neuro chips

Takashi Matsumoto, Haruo Kobayashi, Yoshio Togawa, 1992, IEEE Trans. Neural Networks.

New architecture for envelope-tracking power amplifier for base station

Nobukazu Takai, Haruo Kobayashi, Hitoshi Hirata, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Production Test Considerations for Mixed‐signal IC with Background Calibration

Nobukazu Takai, Haruo Kobayashi, Yohei Tan, 2010 .

Cross-Noise-Coupled Architecture of Complex Bandpass DeltaSigmaAD Modulator

Haruo Kobayashi, Hao San, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2013, IEICE Trans. Electron..

Experimental verification of timing measurement circuit with self-calibration

Haruo Kobayashi, Kentaroh Katoh, Daiki Hirabayashi, 2014, 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings.

A Glitch-Free Time-to-Digital Converter Architecture Based on Gray Code (特集電子回路関連技術)

Haruo Kobayashi, Congbing Li, 2016 .

Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization

Nobukazu Takai, Haruo Kobayashi, Hiroaki Seki, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm

Toshiro Tsukada, Haruo Kobayashi, Tatsuji Matsuura, 2007, IEICE Trans. Electron..

Analog/mixed-signal circuit design in nano CMOS era

Haruo Kobayashi, Kentaroh Katoh, Congbing Li, 2014, IEICE Electron. Express.

Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm

Nobukazu Takai, Haruo Kobayashi, Hiroaki Seki, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Equivalence between Nyquist and Routh-Hurwitz stability criteria for operational amplifier design

Haruo Kobayashi, Gopal Adhikari, Nobukazu Tsukiji, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Architecture of high performance successive approximation time digitizer

Haruo Kobayashi, Takashi Ida, Ryoji Shiota, 2017, 2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).

Reducing spurious output of balanced modulators by dynamic matching of I, Q quadrature paths

Haruo Kobayashi, Hao San, T. Komuro, 2004 .

Performance Improvement of Delta-Sigma ADC/DAC/TDC Using Digital Technique

Jianlong Wang, Haruo Kobayashi, Jun-ya Kojima, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout

Toshiro Tsukada, Kazuyuki Kobayashi, Haruo Kobayashi, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

High-frequency low-distortion one-tone and two-tone signal generation using arbitrary waveform generator

Tomonori Yanagida, Shohei Shibuya, Haruo Kobayashi, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Analysis and Design of Multi-Tone Signal Generation Algorithms for Reducing Crest Factor

Haruo Kobayashi, Anna Kuwana, Koji Asami, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

Study of Gray code input DAC using MOSFETs for glitch reduction

Haruo Kobayashi, Gopal Adhikari, Richen Jiang, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Divide and Conquer: Floating-Point Exponential Calculation Based on Taylor-Series Expansion

Haruo Kobayashi, Anna Kuwana, Jianglin Wei, 2021, 2021 IEEE 14th International Conference on ASIC (ASICON).

Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure

Haruo Kobayashi, Anna Kuwana, Jun-Ichi Matsuda, 2021, 2021 IEEE 14th International Conference on ASIC (ASICON).

Application of Residue Sampling to RF/AMS Device Testing

Haruo Kobayashi, Anna Kuwana, Masahiro Ishida, 2021, 2021 IEEE 30th Asian Test Symposium (ATS).

Floating-Point Inverse Square Root Algorithm Based on Taylor-Series Expansion

Yuuki Tanaka, Haruo Kobayashi, Anna Kuwana, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Floating-Point Square Root Calculation Algorithm Based on Taylor-Series Expansion and Region Division

Yuuki Tanaka, Haruo Kobayashi, Anna Kuwana, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

Study of Helix Functions and Multi-Source Rauch Filters

Haruo Kobayashi, Anna Kuwana, MinhTri Tran, 2021, 2021 IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC).

Study of Rauch Low-Pass Filters using Pascal's Triangle

Haruo Kobayashi, Anna Kuwana, MinhTri Tran, 2021, 2021 International Conference on Electronics, Information, and Communication (ICEIC).

Investigation of Behaviours of Kerwin-Huelsman-Newcomb Filters Using Nichols Charts of Self-Loop Function

Haruo Kobayashi, Anna Kuwana, Tran Minh Tri, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

Testing Technologies for Analog/Mixed-Signal Circuits in IoT Era

Haruo Kobayashi, Anna Kuwana, Nobukazu Tsukiji, 2021 .

High Precision Measurement of Sub-Nano Ampere Current in ATE Environment

Kazumi Hatayama, Haruo Kobayashi, Anna Kuwana, 2021, 2021 IEEE 30th Asian Test Symposium (ATS).

Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method

Kazumi Hatayama, Haruo Kobayashi, Anna Kuwana, 2021, 2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Low-Distortion Single-Tone and Two-Tone Sinewave Generation Using Σ∆ DAC

Kiichi Niitsu, Nobukazu Takai, Haruo Kobayashi, 2011 .

Low-Distortion Single-Tone and Two-Tone Sinewave Generation Algorithms Using an Arbitrary Waveform Generator

Kiichi Niitsu, Kunihito Rikino, Haruo Kobayashi, 2011, 2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop.

Low power consumption control circuit for SIBO DC-DC Converter

Nobukazu Takai, Takahiro Odaguchi, Haruo Kobayashi, 2012 .

Analysis of Coupled Inductors for Low-Ripple Fast-Response Buck Converter

Haruo Kobayashi, Yasunori Kobori, Kenichi Onda, 2009 .

Spread-Spectrum Clocking in Switching Regulators for EMI Reduction

Haruo Kobayashi, Masashi Kono, Takao Myono, 2003, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

High Speed Response Single-Inductor Dual-Output DC-DC Converter with Hysteretic Control

Nobukazu Takai, Haruo Kobayashi, Yasunori Kobori, 2013 .

RC polyphase filter as complex analog Hilbert filter

Haruo Kobayashi, Ryo Sekiyama, Koji Asami, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).