D. Daley

Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications

D. Daley, L. Wagner, S. Narasimha, 2012, 2012 Symposium on VLSI Technology (VLSIT).

Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond

Bernhard Wunder, Balaji Jayaraman, Subramanian S. Iyer, 2012, 2012 IEEE International Conference on IC Design & Technology.