Shunji Nakata

发表

Increasing static noise margin of single-bit-line SRAM by lowering bit-line voltage during reading

Shunji Nakata, Hirotsugu Suzuki, Hiroshi Makino, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Analysis of the stability of adiabatic reversible logic using the theory of normal modes in coupled oscillators

Shunji Nakata, 2006, IEICE Electron. Express.

Supercapacitor Charging Technology with Digital Changes of the Duty Ratio

Shunji Nakata, 2017 .

Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio

Tsutomu Yoshimura, Shunji Nakata, Yoshio Matsuda, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Stability of an adiabatic circuit with inductive load using 1D-capacitor array between the power supply and ground

Shunji Nakata, 2007, IEICE Electron. Express.

An Adiabatic Circuit with Consecutive Changes of the Duty Ratio of the Switching Transistor Using a Microprocessor

Shunji Nakata, Masaki Ono, Masato Sakitani, 2017, J. Circuits Syst. Comput..

Electrostatic Energy, Potential Energy and Energy Dissipation for a Width-Variable Capacitor Coupled with Mechatronical Potential Energy during Adiabatic Charging

Shunji Nakata, Yoshitada Katagiri, 2007, IEICE Trans. Electron..

Adiabatic charging and discharging method with minimum energy dissipation for a variable-gap capacitor system

Shunji Nakata, Masayuki Miyama, Yoshio Matsuda, 2010, IET Circuits Devices Syst..

Adiabatic SRAM with a large margin of VT variation by controlling the cell-power-line and word-line voltage

Shunji Nakata, Masayuki Miyama, Yoshio Matsuda, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines

Tsutomu Yoshimura, Shunji Nakata, Hiroshi Makino, 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage

Hiroki Morimura, Shunji Nakata, Masayuki Miyama, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Accelerated evaluation method for the SRAM cell write margin using word line voltage shift

Hiroki Morimura, Tsutomu Yoshimura, Shunji Nakata, 2011, 2011 International Symposium on Integrated Circuits.

Recent Progress in Adiabatic Circuits

Shunji Nakata, 2009 .

The stability of adiabatic reversible logic using asymmetric tank capacitors and its application to SRAM

Shunji Nakata, 2005, IEICE Electron. Express.

Stability of adiabatic circuit using asymmetric 1D-capacitor array between the power supply and ground

Shunji Nakata, 2007, IEICE Electron. Express.

Analysis of voltage, Current and Energy dissipation of Stepwise Adiabatic Charging of a capacitor using a nonresonant inductor Current

Shunji Nakata, Masayuki Miyama, Yoshio Matsuda, 2014, J. Circuits Syst. Comput..

Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution

Tsutomu Yoshimura, Shunji Nakata, Hirotsugu Suzuki, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

A new stepwise adiabatic charging circuit with a smaller capacitance in a regenerator than a load capacitance

Shunji Nakata, Hiroshi Makino, Yoshio Matsuda, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit

Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Adiabatic SRAM with the large margin of Vth variation by the gradual change of the voltage

Shunji Nakata, 2006, IEICE Electron. Express.

Stable adiabatic circuit using advanced series capacitors and time variation of energy dissipation

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2010, IEICE Electron. Express.

Adiabatic charging reversible logic using a switched capacitor regenerator : New system paradigms for integrated electronics

Shunji Nakata, 2004 .

Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield

Tsutomu Yoshimura, Shunji Nakata, Hirotsugu Suzuki, 2012, IET Circuits Devices Syst..

Stability of adiabatic reversible charging using 1D-capacitor array between the power supply and ground

Shunji Nakata, 2007, IEICE Electron. Express.

Adiabatic quasi 6T-SRAM with shared writing and reading ports

Shunji Nakata, 2008, IEICE Electron. Express.

Energy dissipation decrease during adiabatic charging of a capacitor by changing the duty ratio

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

A low power multiplier using adiabatic charging binary decision diagram circuit

Yuichi Kado, Takakuni Douseki, Shunji Nakata, 2000 .

A 0.5-V, Over 1-GHz, 1-mW MUX/DEMUX Core with Multi-Threshold Zero-Vth CMOS/SIMOX Technology

Takakuni Douseki, Shunji Nakata, Yusuke Ohtomo, 2001 .