Shin'ichiro Mutoh

发表

Increasing static noise margin of single-bit-line SRAM by lowering bit-line voltage during reading

Shunji Nakata, Hirotsugu Suzuki, Hiroshi Makino, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Power management technique for 1-V LSIs using embedded processor

Satoshi Shigematsu, Shin'ichiro Mutoh, Y. Matsuya, 1996, Proceedings of Custom Integrated Circuits Conference.

A wireless sensor-network system with a dynamically programmable sensor interface

Jun Terada, Shin'ichiro Mutoh, Yuichi Kado, 2003, Proceedings of IEEE Sensors 2003 (IEEE Cat. No.03CH37498).

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

Shin'ichiro Mutoh, Takakuni Douseki, Satoshi Shigematsu, 1995, IEEE J. Solid State Circuits.

A High-Speed Feed-Forward BiNMOS Driver for Low-Voltage LSIs (Special Section on Low-Power and Low-Voltage Integrated Circuits)

Shin'ichiro Mutoh, Takakuni Douseki, 1993 .

A 1-V high-speed MTCMOS circuit scheme for power-down applications

Satoshi Shigematsu, Shin'ichiro Mutoh, Junzo Yamada, 1995, Digest of Technical Papers., Symposium on VLSI Circuits..

A 1-V MTCMOS Circuit Hardened to Temperature-Dependent Delay-Time Variation

Shin'ichiro Mutoh, Takakuni Douseki, 1996 .

A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application

Satoshi Shigematsu, Shin'ichiro Mutoh, Junzo Yamada, 1996, IEEE J. Solid State Circuits.

MEMS-switch-based power management with zero-power voltage monitoring for energy accumulation architecture on dust-size wireless sensor nodes

Hiroki Morimura, Kei Kuwabara, Toshishige Shimamura, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines

Tsutomu Yoshimura, Shunji Nakata, Hiroshi Makino, 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

Design and Performance of a Sub-Nano-Ampere Two-Stage Power Management Circuit in 0.35-µm CMOS for Dust-Size Sensor Nodes

Toshishige Shimamura, Shin'ichiro Mutoh, Mamoru Ugajin, 2011, IEICE Trans. Electron..

Accelerated evaluation method for the SRAM cell write margin using word line voltage shift

Hiroki Morimura, Tsutomu Yoshimura, Shunji Nakata, 2011, 2011 International Symposium on Integrated Circuits.

Low-power high-speed 1-V LSI using a 0.25-/spl mu/m MTCMOS/SIMOX technique

Shin'ichiro Mutoh, Satoshi Shigematsu, Y. Tanabe, 1998, Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372).

Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applications

Kenji Suzuki, Hiroki Morimura, Toshishige Shimamura, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution

Tsutomu Yoshimura, Shunji Nakata, Hirotsugu Suzuki, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks

Jun Terada, Shin'ichiro Mutoh, Yuichi Kado, 2005, IEICE Trans. Electron..

Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit

Shunji Nakata, Hirotsugu Suzuki, Shin'ichiro Mutoh, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A 6-bit A/D Converter for MEMS-control circuit

Jun Terada, Junichi Kodate, Katsuyuki Machida, 2005 .

A 1-V high-speed MTCMOS circuit scheme for power-down application circuits

Satoshi Shigematsu, Shin'ichiro Mutoh, Junzo Yamada, 1997, IEEE J. Solid State Circuits.

1V,10MHz High-Speed Digital Circuit Technology with Multi- Threshold CMOS

Shin'ichiro Mutoh, Junzo Yamada, Takakuni Douseki, 1993 .

Stable adiabatic circuit using advanced series capacitors and time variation of energy dissipation

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2010, IEICE Electron. Express.

Integrated CMOS-MEMSTechnology and Its Applications

Hiroki Morimura, Katsuyuki Machida, Shin'ichiro Mutoh, 2008 .

Utilising the normal distribution of the write noise margin to easily predict the SRAM write yield

Tsutomu Yoshimura, Shunji Nakata, Hirotsugu Suzuki, 2012, IET Circuits Devices Syst..

1V high-speed digital circuit technology with 0.5/spl mu/m multi-threshold CMOS

Shin'ichiro Mutoh, Junzo Yamada, T. Douseki, 1993, Sixth Annual IEEE International ASIC Conference and Exhibit.

Ultralow-power CMOS/SOI Circuit Technology for Ubiquitous Communications

Jun Terada, Shin'ichiro Mutoh, Yuichi Kado, 2003 .

A 2-Mb/s, UHF-band, wireless sensor node for real-time multi-point sensing

Jun Terada, Shin'ichiro Mutoh, Tsuneo Tsukahara, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Energy dissipation decrease during adiabatic charging of a capacitor by changing the duty ratio

Shunji Nakata, Shin'ichiro Mutoh, Masayuki Miyama, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

Low-Voltage CMOS Circuit Technology as a Standard in the 21st Century

Shin'ichiro Mutoh, 1999 .

A Sub-nanoampere Two-stage Power Management Circuit in 0.35-µm CMOS for Dust-Size Batteryless Sensor Nodes

Shin'ichiro Mutoh, Mamoru Ugajin, Mitsuru Harada, 2010 .

Synchronized Multiple-Array Vibrational Device for Microelectromechanical System Electrostatic Energy Harvester

Norio Sato, Toshishige Shimamura, Tomomi Sakata, 2012 .