M. Radosavljevic

发表

Advanced CMOS transistors in the nanotechnology era for high-performance, low-power logic applications

J. Kavalieros, B. Doyle, R. Chau, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

The ultimate CMOS device and beyond

M. D. Giles, I. Young, K. J. Kuhn, 2012, 2012 International Electron Devices Meeting.

Emerging silicon and nonsilicon nanoelectronic devices: opportunities and challenges for future high-performance and low-power computational applications

J. Kavalieros, B. Doyle, R. Chau, 2005, IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech)..

Carrier Transport in High-Mobility III–V Quantum-Well Transistors and Performance Impact for High-Speed Low-Power Logic Applications

R. Chau, G. Dewey, M. Radosavljevic, 2008, IEEE Electron Device Letters.

Ultrahigh-Speed 0 . 5 V Supply Voltage In 0 . 7 Ga 0 . 3 As Quantum-Well Transistors on Silicon Substrate

Suman Datta, J. M. Fastenau, R. Chau, 2009 .

High-performance low-leakage enhancement-mode high-K dielectric GaN MOSHEMTs for energy-efficient, compact voltage regulators and RF power amplifiers for low-power mobile SoCs

M. Radosavljevic, S. H. Sung, M. Radosavljevic, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Nonvolatile Molecular Memory Elements Based on Ambipolar Nanotube Field Effect Transistors

M. Radosavljevic, A. T. Johnson, M. Freitag, 2002 .

Logic performance evaluation and transport physics of Schottky-gate III–V compound semiconductor quantum well field effect transistors for power supply voltages (VCC) ranging from 0.5v to 1.0v

R. Chau, G. Dewey, M. Radosavljevic, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Ultrahigh-Speed 0.5 V Supply Voltage $\hbox{In}_{0.7} \hbox{Ga}_{0.3}\hbox{As}$ Quantum-Well Transistors on Silicon Substrate

S. Datta, R. Chau, G. Dewey, 2007, IEEE Electron Device Letters.

Experimental observation and physics of “negative” capacitance and steeper than 40mV/decade subthreshold swing in Al0.83In0.17N/AlN/GaN MOS-HEMT on SiC substrate

J. Kavalieros, R. Chau, G. Dewey, 2013, 2013 IEEE International Electron Devices Meeting.

Heterogeneous integration of enhancement mode in0.7ga0.3as quantum well transistor on silicon substrate using thin (les 2 μm) composite buffer architecture for high-speed and low-voltage ( 0.5 v) logic applications

S. Datta, J. Kavalieros, R. Chau, 2007, 2007 IEEE International Electron Devices Meeting.

High performance of potassium n-doped carbon nanotube field-effect transistors

J. Knoch, M. Radosavljevic, J. Appenzeller, 2004, cond-mat/0402350.