Dimitri Antoniadis

Scaling of stack effect and its application for leakage reduction

Anantha Chandrakasan, Vivek De, Shekhar Y. Borkar, 2001, ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581).

Impact of using adaptive body bias to compensate die-to-die Vt variation on within-die Vt variation

Dimitri Antoniadis, Vivek De, Siva Narendra, 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).

EP1: Moore's law challenges below 10nm: Technology, design and economic implications

Kathy Wilcox, Dimitri Antoniadis, Bing Sheu, 2015, ISSCC.

Nanoelectronics challenges for the 21st century

Dimitri Antoniadis, 2010, DATE '10.

Transistor sizing issues and tool for multi-threshold CMOS technology

Anantha Chandrakasan, Dimitri Antoniadis, James Kao, 1997, DAC.

Design considerations and tools for low-voltage digital system design

Anantha Chandrakasan, Dimitri Antoniadis, Carlin Vieri, 1996, DAC '96.

Full-chip sub-threshold leakage power prediction model for sub-0.18 μm CMOS

Anantha Chandrakasan, Vivek De, Shekhar Y. Borkar, 2002, ISLPED '02.