D. Lake

A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference

Hechen Wang, R. Dorrance, B. Carlton, 2023, IEEE Journal of Solid-State Circuits.

A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference

Hechen Wang, R. Dorrance, B. Carlton, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).

A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup

N. Kurd, S. Pellerano, Hao Luo, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC).