T. C. Mele

Use of screening and response surface experimental designs for development of a 0.5- mu m CMOS self-aligned titanium silicide process

R. E. Jones, T. C. Mele, R. Jones, 1991 .

Integration of a double-polysilicon emitter-base self-aligned bipolar transistor into a 0.5- mu m BiCMOS technology for fast 4-Mb SRAM's

C. Lage, James D. Hayden, T. C. Mele, 1993 .

A high performance 0.5 mu m BiCMOS triple polysilicon technology for 4 Mb fast SRAMs

Asanga H. Perera, James D. Hayden, T. C. Mele, 1990, International Technical Digest on Electron Devices.

The effects of boron penetration on p/sup +/ polysilicon gated PMOS devices

James D. Hayden, James R. Pfiester, T. C. Mele, 1990 .

A high-performance half-micrometer generation CMOS technology for fast SRAMs

Bich-Yen Nguyen, Robert E. Jones, James D. Hayden, 1991 .

A high-performance sub-half micron CMOS technology for fast SRAMs

Bich-Yen Nguyen, James D. Hayden, James R. Pfiester, 1989, International Technical Digest on Electron Devices Meeting.

Selective and anisotropic reactive ion etch of LPCVD silicon nitride with CHF3 based gases

J. P. Krusius, T. C. Mele, J. Nulman, 1984 .

A high-performance 0.5- mu m BiCMOS technology for fast 4-Mb SRAMs

Asanga H. Perera, C. Lage, James D. Hayden, 1992 .

Anisotropic Reactive Ion Etching of MoSi2 and In Situ Doped n+ and p+ Polysilicon Using Cl2 and BCl3

J. P. Krusius, T. C. Mele, S. C. Arney, 1988 .

The influence of fluorine on threshold voltage instabilities in p/sup +/ polysilicon gated p-channel MOSFETs

Hsing-Huang Tseng, James D. Hayden, James R. Pfiester, 1989, International Technical Digest on Electron Devices Meeting.