Yaron Arbetman

An effective and flexible approach to functional verification of processor families

Matthew Taylor, Merav Aharoni, David Malandain, 2002, Seventh IEEE International High-Level Design Validation and Test Workshop, 2002..

Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family

Laurent Fournier, Moshe Levinger, Yaron Arbetman, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

VLIW - a case study of parallelism verification

Allon Adir, Yossi Lichtenstein, Michal Rimon, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Functional verification methodology for microprocessors using the Genesys test-program generator

Laurent Fournier, Moshe Levinger, Yaron Arbetman, 1999, DATE '99.