Yun-Seok Yang

A Block-based Motion Detection Algorithm with Adaptive Thresholds for Digital Video Surveillance Systems

Dong-Ho Lee, Yun-Seok Yang, 2000 .

A Sub-1.0V 20nm 5Gb/s/pin post-LPDDR3 I/O interface with Low Voltage-Swing Terminated Logic and adaptive calibration scheme for mobile application

Jung-Hwan Choi, Min-Ho Park, Kwang-Il Park, 2013, 2013 Symposium on VLSI Circuits.

A 7Gb/s/pin GDDR5 SDRAM with 2.5ns bank-to-bank active time and no bank-group restriction

Jae-Hyung Lee, Young-Hyun Jun, Dong-Min Kim, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW

Young-Hyun Jun, Dae-Hyun Kim, Young-Sik Kim, 2011, 2011 IEEE International Solid-State Circuits Conference.

A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction

Jae-Hyung Lee, Young-Hyun Jun, Dong-Min Kim, 2011, IEEE Journal of Solid-State Circuits.