Sabyasachi Deyati

发表

Xian Wang, Sabyasachi Deyati, Monodeep Kar, 2013 .

Design of efficient analog physically unclonable functions using alternative test principles

Abhijit Chatterjee, Sabyasachi Deyati, Barry Muldrey, 2017, 2017 International Mixed Signals Testing Workshop (IMSTW).

Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware

Abhijit Chatterjee, Sabyasachi Deyati, Barry J. Muldrey, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Concurrent built in test and tuning of beamforming MIMO systems using learning assisted performance optimization

Abhijit Chatterjee, Sabyasachi Deyati, Byunghoo Jung, 2017, 2017 IEEE International Test Conference (ITC).

Post silicon validation of analog/mixed signal/RF circuits and systems: recent advances

Abhijit Chatterjee, Sabyasachi Deyati, Barry J. Muldrey, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits

Abhijit Chatterjee, Sabyasachi Deyati, Aritra Banerjee, 2014, 2014 IEEE 32nd VLSI Test Symposium (VTS).

Adaptive testing of analog/RF circuits using hardware extracted FSM models

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 IEEE 34th VLSI Test Symposium (VTS).

Low cost signal reconstruction based testing of RF components using incoherent undersampling

Abhijit Chatterjee, Debesh Bhatta, Sabyasachi Deyati, 2013, 2013 14th Latin American Test Workshop - LATW.

TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2017, 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID).

Trojan detection in digital systems using current sensing of pulse propagation in logic gates

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 17th International Symposium on Quality Electronic Design (ISQED).

DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 IEEE International Test Conference (ITC).

Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security

Abhijit Chatterjee, Adit D. Singh, Sabyasachi Deyati, 2015, 2015 IEEE 24th Asian Test Symposium (ATS).

BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

An automated design methodology for yield aware analog circuit synthesis in submicron technology

Pradip Mandal, Sabyasachi Deyati, 2011, 2011 12th International Symposium on Quality Electronic Design.

Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits

Abhijit Chatterjee, Shyam Kumar Devarakond, Sabyasachi Deyati, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time

Rahul Khanna, Patrick Chiang, Sabyasachi Deyati, 2014, 2014 International Test Conference.

High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure

Abhijit Chatterjee, Adit D. Singh, Sabyasachi Deyati, 2014, 2014 IEEE 23rd Asian Test Symposium.

VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests

Abhijit Chatterjee, Sabyasachi Deyati, Aritra Banerjee, 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

Noise-Resilient SRAM Physically Unclonable Function Design for Security

Abhijit Chatterjee, Sabyasachi Deyati, Adit Singh, 2016, 2016 IEEE 25th Asian Test Symposium (ATS).

Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis

Abhijit Chatterjee, Sabyasachi Deyati, Aritra Banerjee, 2012, 2012 IEEE 18th International On-Line Testing Symposium (IOLTS).

Low Cost Signal Reconstruction Based Testing of RF Components using Incoherent Undersampling

Abhijit Chatterjee, Debesh Bhatta, Sabyasachi Deyati, 2014, J. Electron. Test..

RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning

Abhijit Chatterjee, Sabyasachi Deyati, Michael Giardino, 2013, 2013 IEEE 31st VLSI Test Symposium (VTS).

Targeting hardware trojans in mixed-signal circuits for security

Abhijit Chatterjee, Sabyasachi Deyati, Barry J. Muldrey, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 IEEE 25th Asian Test Symposium (ATS).

Scalable algorithms and design for debug hardware for test, validation and security of mixed signal/rf circuits and systems

Sabyasachi Deyati, Sabyasachi Deyati, 2017 .

High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems

Abhijit Chatterjee, Sabyasachi Deyati, Barry J. Muldrey, 2021, J. Electron. Test..