M. G. Arnold

Improved cotransformation for LNS subtraction

M. G. Arnold, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

On the cost effectiveness of logarithmic arithmetic for backpropagation training on SIMD processors

J. J. Cupal, M. G. Arnold, Thomas Bailey, 1997, Proceedings of International Conference on Neural Networks (ICNN'97).

Guidelines for safe simulation and synthesis of implicit style Verilog

Neal Sample, M. G. Arnold, J. D. Shuler, 1998, Proceedings International Verilog HDL Conference and VHDL International Users Forum.

Finite precision analysis of support vector machine classification in logarithmic number systems

William M. Pottenger, Faisal M. Khan, M. G. Arnold, 2004 .

A synthesis preprocessor that converts implicit style Verilog into one-hot designs

M. G. Arnold, J. D. Shuler, 1997, Proceedings of Meeting on Verilog HDL (IVC/VIUF'97).

A pipelined LNS ALU

M. G. Arnold, 2001, Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems.