Matteo Sonza Reorda

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A Fault Injection Environment for SoPC's Embedded Microprocessors

Massimo Violante, Luca Sterpone, Marta Portela-Garcia, 2006, Latin American Test Workshop - LATW.

An Enhanced Evolutionary Technique for the Generation of Compact Reconfigurable Scan-Network Tests

Giovanni Squillero, Riccardo Cantoro, Matteo Sonza Reorda, 2019, J. Circuits Syst. Comput..

Assessing the Effectiveness of Different Test Approaches for Power Devices in a PCB

Matteo Sonza Reorda, Radu Bojoi, D. Piumatti, 2021, IEEE Journal of Emerging and Selected Topics in Power Electronics.

Simulation-based analysis of SEU effects in SRAM-based FPGAs

D. Bortolato, M. Ceschia, Massimo Violante, 2004 .

VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things

Michail Maniatakos, Matteo Sonza Reorda, Ibrahim M. Elfadel, 2017, IFIP Advances in Information and Communication Technology.

A new DFM-proactive technique

Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, 2005 .

A programmable BIST approach for the diagnosis of embedded memory cores

Massimo Violante, Paolo Bernardi, Maurizio Rebaudengo, 2003 .

Guest Editor's Introduction: Special Section on High Dependability Systems

Cecilia Metra, Matteo Sonza Reorda, 2020, IEEE Trans. Emerg. Top. Comput..

On-line analysis and perturbation of CAN networks

Massimo Violante, Matteo Sonza Reorda, 2004 .

A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs

Luca Sterpone, Matteo Sonza Reorda, Josie E. Rodriguez Condia, 2020, 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Evaluating the Code Encryption Effects on Memory Fault Resilience

Riccardo Cantoro, Matteo Sonza Reorda, Emanuele Valea, 2020, 2020 IEEE Latin-American Test Symposium (LATS).

An Automatic Functional Stress Pattern Generation Technique Suitable for SoC Reliability Characterization

Matteo Sonza Reorda, Michelangelo Grosso, D. Appello, 2008 .

On Reducing the Peak Power Consumption of Test Sequences

Massimo Violante, Maurizio Rebaudengo, Fulvio Corno, 1999 .

Struttura, organizzazione e progetto dei calcolatori. Interdipendenza fra hardware e software - Seconda Edizione

Laura Farinetti, Fulvio Corno, Marco Mezzalama, 2000 .

Software Techniques for Dependable Computer-based Systems

Massimo Violante, Maurizio Rebaudengo, Matteo Sonza Reorda, 2004 .

Exploiting circuit emulation for fast hardness evaluation

Massimo Violante, Maurizio Rebaudengo, Matteo Sonza Reorda, 2001 .

Multilevel Simulation Methodology for FMECA Study Applied to a Complex Cyber-Physical System

Massimo Violante, Matteo Sonza Reorda, Radu Bojoi, 2020 .

Exploring the Mysteries of System-Level Test

Matthias Sauer, Krishnendu Chakrabarty, Paolo Bernardi, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

A new hardware/software platform for the soft-error sensitivity evaluation of FPGA devices

Gian Carlo Cardarilli, Salvatore Pontarelli, Adelio Salsano, 2007 .

Exploiting an I-IP for in-field SoC test

Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, 2004 .

Report on Dissemination Plan

Petru Eles, Zebo Peng, Massimo Violante, 2002 .

Software-level soft-error mitigation techniques

Massimo Violante, Maurizio Rebaudengo, Matteo Sonza Reorda, 2011 .

AN EFFICIENT METHODOLOGY FOR REDUCING SoC TEST DATA VOLUME ON LOW-COST TESTERS

Paolo Bernardi, Matteo Sonza Reorda, 2008 .

New Perspectives on Core In-field Path Delay Test

Lorena Anghel, Riccardo Cantoro, Matteo Sonza Reorda, 2020, 2020 IEEE International Test Conference (ITC).

Coping with SEUs/SETs in microprocessors by means of low-cost solutions: a comparison study

Massimo Violante, Maurizio Rebaudengo, Matteo Sonza Reorda, 2002 .

Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network

Riccardo Cantoro, Matteo Sonza Reorda, Emanuele Valea, 2020, 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU

Luca Sterpone, Matteo Sonza Reorda, Jose Rodrigo Azambuja, 2020, 2020 IEEE Latin-American Test Symposium (LATS).

Approaching production diagnostic for BIST-based testing

Maurizio Rebaudengo, Matteo Sonza Reorda, Paolo Bernardi, 2004 .

Assessing the Effectiveness of the Test of Power Devices at the Board Level

Fabio Mandrile, Iustin Radu Bojoi, Matteo Sonza Reorda, 2019, 2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS).

Test Solution for Heatsinks in Power Electronics Applications

Franco Fiori, Matteo Sonza Reorda, Eric Armando, 2020 .

Testing Heatsink Faults in Power Transistors by means of Thermal Model

Franco Fiori, Matteo Sonza Reorda, Davide Piumatti, 2020, 2020 IEEE Latin-American Test Symposium (LATS).

Software-Based Self-Test for Transition Faults: a Case Study

Matteo Sonza Reorda, Andrea Casalino, Salvatore Rinaudo, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).