Sambasivan Narayan

First-Order Incremental Block-Based Statistical Timing Analysis

K. Ravindran, Jeffrey G. Hemmett, Chandramouli Visweswariah, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

First-order incremental block-based statistical timing analysis

Jeffrey G. Hemmett, Natesan Venkateswaran, D. Beece, 2004, Proceedings. 41st Design Automation Conference, 2004..

First-Order Incremental Block-Based Statistical Timing Analysis

Jeffrey G. Hemmett, Natesan Venkateswaran, D. Beece, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.