Min-Che Hsieh

Playing Technique Classification Based on Deep Collaborative Learning of Variational Auto-Encoder and Gaussian Process

Jia-Ching Wang, Yuan-Shan Lee, Sih-Huei Chen, 2018, 2018 IEEE International Conference on Multimedia and Expo (ICME).

Real-Time Seismic Data Acquisition via a Paired Ripple Transmission Protocol

Kao-Shing Hwang, Jin-Ling Lin, Hui-Kai Su, 2013, Int. J. Distributed Sens. Networks.

A new laterally conductive bridge random access memory by fully CMOS logic compatible process

Yu-Cheng Lin, Ming-Jinn Tsai, Yu-Der Chih, 2014 .

A Highly Scalable Interface Fuse for Advanced CMOS Logic Technologies

Chrong Jung Lin, Min-Che Hsieh, Yung-Wen Chin, 2012, IEEE Electron Device Letters.

Self-Rectifying Twin-Bit RRAM in 3-D Interweaved Cross-Point Array

Ya-Chin King, Min-Che Hsieh, Yung-Wen Chin, 2015, IEEE Journal of the Electron Devices Society.

Characterization of Multilayer Metal Gate Fuse in 28-nm CMOS Logic Technology

Ya-Chin King, Min-Che Hsieh, Yung-Wen Chin, 2013, IEEE Electron Device Letters.

Point twin-bit RRAM in 3D interweaved cross-point array by Cu BEOL process

Ya-Chin King, Chrong Jung Lin, Min-Che Hsieh, 2014, 2014 IEEE International Electron Devices Meeting.