H. N. Jorgensen

A Fully Parallel VLSI-implementation of the Viterbi Decoding Algorithm

J. Sparso, H. N. Jorgensen, E. Paaske, 1989, ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference.

An area-efficient topology for VLSI implementation of Viterbi decoders and other shuffle-exchange type structures

Jens Sparsø, H. N. Jorgensen, E. Paaske, 1991 .