Jung Kuk Kim

High-performance spiking neural net accelerators for embedded computer vision applications

Chester Liu, Zhengya Zhang, Thomas Chen, 2017, 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning

Zhengya Zhang, Thomas Chen, Phil C. Knag, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

Hardware acceleration of iterative image reconstruction for X-ray computed tomography

Jeffrey A. Fessler, Zhengya Zhang, Jung Kuk Kim, 2011, 2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Algorithm and Architecture Co-design for High-performance Digital Signal Processing.

Jung Kuk Kim, J. K. Kim, 2015 .

A 6.67mW sparse coding ASIC enabling on-chip learning and inference

Zhengya Zhang, Thomas Chen, Phil Knag, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

Efficient Hardware Architecture for Sparse Coding

Zhengya Zhang, Thomas Chen, Phil Knag, 2014, IEEE Transactions on Signal Processing.

Forward-Projection Architecture for Fast Iterative Image Reconstruction in X-Ray CT

Jeffrey A. Fessler, Zhengya Zhang, Jung Kuk Kim, 2012, IEEE Transactions on Signal Processing.

A Sparse Coding Neural Network ASIC With On-Chip Learning for Feature Extraction and Encoding

Zhengya Zhang, Thomas Chen, Phil C. Knag, 2015, IEEE Journal of Solid-State Circuits.