Wen-Tai Wang

A 28nm 36kb high speed 6T SRAM with source follower PMOS read and bit-line under-drive

Shyh-Jye Jou, Yi-Wei Chiu, Chi-Hao Hong, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

A low-power charge sharing hierarchical bitline and voltage-latched sense amplifier for SRAM macro in 28 nm CMOS technology

Shyh-Jye Jou, Yi-Wei Chiu, Chi-Hao Hong, 2014, 2014 27th IEEE International System-on-Chip Conference (SOCC).

Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology

Chun-Yu Lin, Ming-Dou Ker, Rong-Kun Chang, 2015, 2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits.

Study on the ESD-induced gate-oxide breakdown and the protection solution in 28nm high-k metal-gate CMOS technology

Chun-Yu Lin, Ming-Dou Ker, Wen-Tai Wang, 2015, 2015 IEEE Nanotechnology Materials and Devices Conference (NMDC).