Wen Ji

Data conflict resolution for layered LDPC decoding algorithm by selective recalculation

Wen Ji, H Nakayama, M Hamaminato, 2010, 2010 3rd International Congress on Image and Signal Processing.

A novel hardware-friendly self-adjustable offset min-sum algorithm for ISDB-S2 LDPC decoder

Satoshi Goto, Hiroshi Nakayama, Wen Ji, 2010, 2010 18th European Signal Processing Conference.

A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule

Satoshi Goto, Takeshi Ikenaga, Wen Ji, 2009, IPSJ Trans. Syst. LSI Des. Methodol..

A high performance LDPC decoder for IEEE802.11n standard

Satoshi Goto, Takeshi Ikenaga, Wen Ji, 2009, 2009 Asia and South Pacific Design Automation Conference.

A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule

Satoshi Goto, Takeshi Ikenaga, Wen Ji, 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A power-saving 1Gbps Irregular LDPC Decoder based on high-efficiency messagepassing

T. Ikenaga, S. Goto, Xianghui Wei, 2008 .

A cost-efficient partially-parallel irregular LDPC decoder based on sum-delta message passing algorithm

Satoshi Goto, Takeshi Ikenaga, Wen Ji, 2008, GLSVLSI '08.

High throughput partially-parallel irregular LDPC decoder based on delta-value message-passing schedule

Xing Li, T. Ikenaga, S. Goto, 2008, 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT).