S. Iwanari

A 0.9-V 1T1C SBT-based embedded nonvolatile FeRAM with a reference voltage scheme and multilayer shielded bit-line structure

S. Iwanari, H. Hirano, T. Nakakuma, 2005, IEEE Journal of Solid-State Circuits.

A 200mhz 16mbit Synchronous Dram With Block Access Mode

Toshio Yamada, Atsushi Fujiwara, Hirohito Kikukawa, 1994, Proceedings of 1994 IEEE Symposium on VLSI Circuits.