Jianan Liu

A 14-bit 1.0-GS/s dynamic element matching DAC with >80 dB SFDR up to the Nyquist

Qi Wei, Huazhong Yang, Xueqing Li, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ

Qi Wei, Huazhong Yang, Hui Wang, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.