Masato Sakurai

CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, IEEE Journal of Solid-State Circuits.

A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2012, 17th Asia and South Pacific Design Automation Conference.

An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation

Takahiro J. Yamaguchi, Kiichi Niitsu, Haruo Kobayashi, 2011, IEEE Asian Solid-State Circuits Conference 2011.