Takashi Yoshitomi

发表

Statistical analysis of time series data on the number of faults detected by software testing

Sousuke Amasaki, Yasunari Takagi, Osamu Mizuno, 2002, Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02)..

CMOS/BiCMOS Technology

Hiroshi Iwai, Hideaki Nii, Hidemi Ishiuchi, 1999, The VLSI Handbook.

Design and Implementation of Web based Measurement System for Beginner of Electric and Electronic Circuit

Shinichi Sasaki, Tatsuya Furukawa, Takashi Yoshitomi, 2010 .

A New Challenge for Applying Time Series Metrics Data to Software Quality Estimation

Sousuke Amasaki, Yasunari Takagi, Osamu Mizuno, 2005, Software Quality Journal.

Single-gate 0.15 and 0.12 μm CMOS with Co salicide technology

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1999 .

Headphone Amplifier and its Layout for Education for High School Student

Takuro Noguchi, Sumio Fukai, Yohei Ishikawa, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

0.15-/spl mu/m RF CMOS technology compatible with logic CMOS for low-voltage operation

Ryuichi Fujimoto, Hiroshi Iwai, Hiroshi Tanimoto, 1998 .

Development of Remote Measurement System for Studying Electronic Circuits on Web Browser

Shinichi Sasaki, Masashi Ohchi, Tatsuya Furukawa, 2009 .

Design and implementation of study support system for electronic circuits with observable V-I characteristics

Shinichi Sasaki, Masashi Ohchi, Tatsuya Furukawa, 2010 .

Advanced rf CMOS technology

Hiroshi Iwai, K. Inoh, Tatsuya Ohguro, 1999, Smart Materials, Nano-, and Micro- Smart Systems.

Thermal stability of CoSi/sub 2/ film for CMOS salicide

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 2000 .

High performance MIM capacitor for RF BiCMOS/CMOS LSIs

Hiroshi Iwai, T. Ohguro, H. S. Momose, 1999, Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).

Prospects for low-power, high-speed MPUs using 1.5 nm direct-tunneling gate oxide MOSFETs

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1997 .

Cutoff frequency and propagation delay time of 1.5-nm gate oxide CMOS

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 2001 .

High performance RF characteristics of raised gate/source/drain CMOS with Co salicide

Hiroshi Iwai, H. Kimijima, Hiroshi Naruse, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Silicided silicon-sidewall source and drain (S/sup 4/D) structure for high-performance 75-nm gate length pMOSFETs

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

An 0.18-/spl mu/m CMOS for mixed digital and analog applications with zero-volt-V/sub th/ epitaxial-channel MOSFETs

Hiroshi Iwai, H. Kimijima, Hiroshi Naruse, 1999 .

Power Si-MOSFET operating with high efficiency under low supply voltage

Hiroshi Iwai, K. Matsuzaki, Tatsuya Ohguro, 2000 .

Tenth micron p-MOSFET's with ultra-thin epitaxial channel layer grown by ultra-high-vacuum CVD

Hiroshi Iwai, C. Fiegna, Y. Akasaka, 1993, Proceedings of IEEE International Electron Devices Meeting.

Nitrogen-doped nickel monosilicide technique for deep submicron CMOS salicide

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1995, Proceedings of International Electron Devices Meeting.

Analysis of resistance behavior in Ti- and Ni-salicided polysilicon films

Hiroshi Iwai, Tatsuya Ohguro, Yukihiro Ushiku, 1994 .

A study on hot carrier effects on N-MOSFETs under high substrate impurity concentration

Hiroshi Iwai, C. Fiegna, Tatsuya Ohguro, 1995 .

High performance digital-analog mixed device on an Si substrate with resistivity beyond 1 k/spl Omega/ cm

Tatsuya Ohguro, Takashi Yoshitomi, T. Kimura, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

A high frequency 0.35 /spl mu/m gate length power silicon NMOSFET operating with breakdown voltage of 13 V

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1995, Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95.

RF noise in 1.5 nm gate oxide MOSFETs and the evaluation of the NMOS LNA circuit integrated on a chip

Shoji Otaka, Hiroshi Iwai, H. Kimijima, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Advantage of small geometry silicon MOSFETs for high-frequency analog applications under low power supply voltage of 0.5 V

Hiroshi Iwai, Hiroshi Tanimoto, Tatsuya Ohguro, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

Tunneling gate oxide approach to ultra-high current drive in small geometry MOSFETs

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

Fabrication of sub‐50‐nm gate length n‐metal–oxide–semiconductor field effect transistors and their electrical characteristics

Hiroshi Iwai, Claudio Fiegna, Tatsuya Ohguro, 1995 .

The influence of oxygen at epitaxial Si/Si substrate interface for 0.1 /spl mu/m epitaxial Si channel N-MOSFETs grown by UHV-CVD

Hiroshi Iwai, Tatsuya Ohguro, Hisayo Sasaki Momose, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

Undoped epitaxial Si channel n-MOSFET grown by UHV-CVD with preheating

Hiroshi Iwai, H. Kimijima, Tatsuya Ohguro, 1998 .