A. G. Hirschbiel

Patil array-a Petri net hardware implementation

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1988, [Proceedings] COMPEURO 88 - System Design: Concepts, Methods and Tools.

A Novel ASIC Design Approach based on a New Machine Paradigm

A. G. Hirschbiel, R. W. Hartenstein, K. Schmidt, 1990, ESSCIRC '90: Sixteenth European Solid-State Circuits Conference.

Mapping systolic arrays onto the map-oriented machine (MoM)

Reiner W. Hartenstein, A. G. Hirschbiel, M. Webber, 1990 .

MOM-Map Oriented Machine

Reiner W. Hartenstein, A. G. Hirschbiel, Marc H Weber, 1987 .

MOM-map-oriented machine-a partly custom-designed architecture compared to standard hardware

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1989, Proceedings. VLSI and Computer Peripherals. COMPEURO 89.

A PSEUDO PARALLEL ARCHITECTURE FOR SYSTOLIC ALGORITHMS

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1989 .

Using Xputers as Universal Accelerators for Neuro Network Simulation and its Applications

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1990 .

A high performance machine paradigm based on auto-sequencing data memory

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1991, Proceedings of the Twenty-Fourth Annual Hawaii International Conference on System Sciences.

A flexible architecture for image processing

Reiner W. Hartenstein, Michael Weber, A. G. Hirschbiel, 1987 .