N. Barin

Analysis of strained-silicon-on-insulator double-gate MOS structures

C. Fiegna, N. Barin, E. Sangiorgi, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

Small-Signal Analysis of Decananometer Bulk and SOI MOSFETs for Analog/Mixed-Signal and RF Applications Using the Time-Dependent

Enrico Sangiorgi, Claudio Fiegna, Pierpaolo Palestri, 2007 .

Comparison of Modeling Approaches for the Capacitance–Voltage and Current–Voltage Characteristics of Advanced Gate Stacks

C. Busseret, E. Langer, C. Fiegna, 2007, IEEE Transactions on Electron Devices.

32nm technology node Double-Gate SOI MOSFET using SiO2 gate stacks

C. Fiegna, E. Sangiorgi, N. Barin, 2006, 2006 International Workshop on Nano CMOS.