Fabio Frustaci

发表

Comparative analysis of yield optimized pulsed flip-flops

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2012, Microelectron. Reliab..

A self-hosting configuration management system to mitigate the impact of Radiation-Induced Multi-Bit Upsets in SRAM-based FPGAs

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, 2010 IEEE International Symposium on Industrial Electronics.

Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Low-power split-path data-driven dynamic logic

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2009, IET Circuits Devices Syst..

An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2009, ARC.

Designing Fast Convolutional Engines for Deep Learning Applications

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Design of efficient QCA multiplexers

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2016, Int. J. Circuit Theory Appl..

Design and evaluation of high-speed energy-aware carry skip adders

Marco Lanuzza, Fabio Frustaci, Raffaele De Rose, 2010, 2010 International Conference on Microelectronics.

Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Power supply noise in accurate delay model for the sub-threshold domain

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2015, Integr..

Impact of Process Variations on Pulsed Flip-Flops: Yield Improving Circuit-Level Techniques and Comparative Analysis

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, PATMOS.

Design of Energy Aware Adder Circuits Considering Random Intra-Die Process Variations

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2011 .

Optimization and evaluation of tapered-VTH approach for energy-efficient CMOS buffers

Pasquale Corsonello, Fabio Frustaci, Massimo Alioto, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

Embedded surveillance system using background subtraction and Raspberry Pi

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2015, 2015 AEIT International Annual Conference (AEIT).

Tapered-Vth Approach for Energy-Efficient CMOS Buffers

Massimo Alioto, Pasquale Corsonello, Fabio Frustaci, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

Tapered-Vth Approach for Energy-Efficient

Pasquale Corsonello, Fabio Frustaci, Massimo Alioto, 2011 .

13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS

David Blaauw, Massimo Alioto, Dennis Sylvester, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

Energy-Efficient Architecture for CNNs Inference on Heterogeneous FPGA

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2019 .

Analytical Delay Model Considering Variability Effects in Subthreshold Domain

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Energy-efficient single-clock-cycle binary comparator

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2012, Int. J. Circuit Theory Appl..

Approximate SRAMs With Dynamic Energy-Quality Management

David Blaauw, Massimo Alioto, Dennis Sylvester, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, 2020 9th Mediterranean Conference on Embedded Computing (MECO).

Parallel architecture of power-of-two multipliers for FPGAs

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, IET Circuits Devices Syst..

Analyzing noise robustness of wide fan-in dynamic logic gates under process variations

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2014, Int. J. Circuit Theory Appl..

An embedded machine vision system for an in-line quality check of assembly processes

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, Procedia Manufacturing.

Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, TRETS.

A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2008, PATMOS.

Efficient Approximate Adders for FPGA-Based Data-Paths

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020 .

Design of Real-Time FPGA-based Embedded System for Stereo Vision

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Low-Leakage SRAM Wordline Drivers for the 28-nm UTBB FDSOI Technology

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse

David Blaauw, Massimo Alioto, Dennis Sylvester, 2015, 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

A New Optimized High-Speed Low-Power Data-Driven Dynamic (D3L) 32-Bit Kogge-Stone Adder

Marco Lanuzza, Fabio Frustaci, 2009, PATMOS.

Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation

Massimo Alioto, Stefania Perri, Pasquale Corsonello, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Leakage energy reduction techniques in deep submicron cache memories: a comparative study

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology

Massimo Alioto, Pasquale Corsonello, Fabio Frustaci, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Designing Dynamic Carry Skip Adders: Analysis and Comparison

Marco Lanuzza, Raffaele De Rose, Fabio Frustaci, 2014, Circuits Syst. Signal Process..

SRAM for Error-Tolerant Applications With Dynamic Energy-Quality Management in 28 nm CMOS

David Blaauw, Massimo Alioto, Dennis Sylvester, 2015, IEEE Journal of Solid-State Circuits.

Multimodal background subtraction for high-performance embedded systems

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2019, Journal of Real-Time Image Processing.

A new low-power high-speed single-clock-cycle binary comparator

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

An efficient hardware-oriented stereo matching algorithm

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2016, Microprocess. Microsystems.

Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A novel background subtraction method based on color invariants and grayscale levels

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2014, 2014 International Carnahan Conference on Security Technology (ICCST).

An Efficient Connected Component Labeling Architecture for Embedded Systems

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018 .

A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS

David Blaauw, Massimo Alioto, Dennis Sylvester, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

Impact of Process Variations on Flip-Flops Energy and Timing Characteristics

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Stereo vision architecture for heterogeneous systems-on-chip

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018, Journal of Real-Time Image Processing.

Design of Efficient BCD Adders in Quantum-Dot Cellular Automata

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

Approximate Multipliers With Dynamic Truncation for Energy Reduction via Graceful Quality Degradation

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Designing High-Speed Adders in Power-Constrained Environments

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.

Improving the Quality Degradation of Dynamically Configurable Approximate Multipliers via Data Correlation

Fabio Frustaci, 2021 .

8 A 32 kb SRAM for Error-Free and Error-Tolerant Applications with Dynamic Energy-Quality Management in 28 nm CMOS

David Blaauw, Massimo Alioto, Dennis Sylvester, 2018 .