Yijin Guan

GNN-PIM: A Processing-in-Memory Architecture for Graph Neural Networks

Zhao Wang, Hongzhong Zheng, Dimin Niu, 2020, Conference on Advanced Computer Architecture.

Using Data Compression for Optimizing FPGA-Based Convolutional Neural Network Accelerators

Jason Cong, Chen Zhang, Yijin Guan, 2017, APPT.

Crane: Mitigating Accelerator Under-utilization Caused by Sparsity Irregularities in CNNs

Jason Cong, Yuan Xie, Yijin Guan, 2020, IEEE Transactions on Computers.

FPGA-based accelerator for long short-term memory recurrent neural networks

Jason Cong, Guangyu Sun, Yijin Guan, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates

Xi Chen, Wei Zhang, Jason Cong, 2017, 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks

Jason Cong, Chen Zhang, Yijin Guan, 2015, FPGA.

BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices

Guangyu Sun, Yijin Guan, Guojie Luo, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).