Shylashree Nagaraja

A Unified Architecture for a Dual Field ECC Processor Applicable to AES

Shylashree Nagaraja, Venugopalachar Sridhar, 2013, 2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation.

Non-crossing Rectilinear Shortest Minimum Bend Paths in the Presence of Rectilinear Obstacles

Shylashree Nagaraja, 2018 .