Kerem Akarvardar

Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage

H.-S. Philip Wong, Subhasish Mitra, Roger T. Howe, 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

Four-Quadrant Analog Multipliers Using G4-FETs

Mohammad Mojarradi, Kerem Akarvardar, Benjamin Blalock, 2006 .

High-temperature performance of state-of-the-art triple-gate transistors

Sorin Cristoloveanu, Cor Claeys, Eddy Simoen, 2007, Microelectron. Reliab..

Using G4FETs as a Data Router for In-Plane Crossing of Signal Paths

Sorin Cristoloveanu, Amir Fijany, Farrokh Vatan, 2007 .

Efficient FPGAs using nanoelectromechanical relays

H.-S. Philip Wong, Nishant Patil, Subhasish Mitra, 2010, FPGA '10.

Technology Projection Using Simple Compact Models

H.-S. Philip Wong, Jie Deng, Lan Wei, 2009, 2009 International Conference on Simulation of Semiconductor Processes and Devices.

Enhanced coupling effects in vertical double-gate FinFETs

Sorin Cristoloveanu, Jung-Hee Lee, Jong-Hyun Lee, 2014 .

A Density Metric for Semiconductor Technology [Point of View]

H.-S. Philip Wong, Jeffrey Bokor, James D. Plummer, 2020, Proc. IEEE.

The G4-FET: a universal and programmable logic gate

Sorin Cristoloveanu, Amir Fijany, Farrokh Vatan, 2005, GLSVLSI '05.

A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS

Mahmut E. Sinangil, Rawan Naous, Yih Wang, 2021, IEEE Journal of Solid-State Circuits.

Scanning the issue

Mohamed-Slim Alouini, Tareq Y. Al-Naffouri, Elias Yaacoub, 2019, IEEE Trans. Autom. Control..

An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications

Hidehiro Fujiwara, Tan-Li Chou, Yu-Der Chih, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).