M. Dessouky

Analog, Digital and Mixed-Signal Design Flows

H.G. Bakeer, O. Shaheen, H.M. Eissa, 2007, 2007 2nd International Design and Test Workshop.

A low-power, 9-Bit, 1.2 ps resolution two-step time-to-digital converter in 65 nm CMOS

M. Dessouky, A. Hamza, Sameh Ibrahim, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

Knowledge-based design automation of highly non-linear circuits using simulation correction

M. Dessouky, M. Zakaria, M. Madbouly, 2003, Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442).

Power Grid Automatic Metal Filling Algorithm Forming Maximum on-chip Decoupling Capacitance

M. Dessouky, A. Tork, M. AbulMakarem, 2007, 2007 2nd International Design and Test Workshop.

A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter

M. Dessouky, Sameh Ibrahim, M. El-Nozahi, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Design of a low-mismatch gain-boosting charge pump for phase-locked loops

M. Dessouky, R.H. Mekky, 2007, 2007 Internatonal Conference on Microelectronics.

A third-order current-mode continuous-time /spl Sigma//spl Delta/ modulator

P. Loumeau, M. Dessouky, H. Aboushady, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A framework theory for Dynamic Compact Thermal Models

M. Dessouky, M-N Sabry, 2012, 2012 28th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM).

Tunable bandpass sigma delta modulators

M. Dessouky, H.F. Ragai, M.A. El-Nozahi, 2003, 2003 46th Midwest Symposium on Circuits and Systems.