B. Degroote

Comprehensive approach to MuGFET metrology

Rita Rooyackers, Philippe Leray, Shaunee Cheng, 2006, SPIE Advanced Lithography.

A 0.314/spl mu/m/sup 2/ 6T-SRAM cell build with tall triple-gate devices for 45nm applications using 0.75NA 193nm lithography

R. Rooyackers, M. Van Hove, K. Ronse, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

A functional 41-stage ring oscillator using scaled FinFET devices with 25-nm gate lengths and 10-nm fin widths applicable for the 45-nm CMOS node

R. Rooyackers, N. Collaert, R. Jonckheere, 2004, IEEE Electron Device Letters.

Integration of tall triple-gate devices with inserted-Ta/sub x/N/sub y/ gate in a 0.274/spl mu/m/sup 2/ 6T-SRAM cell and advanced CMOS logic circuits

R. Rooyackers, M. Van Hove, K. Ronse, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Doubling or quadrupling MuGFET fin integration scheme with higher pattern fidelity, lower CD variation and higher layout efficiency

R. Rooyackers, E. Augendre, N. Collaert, 2006, 2006 International Electron Devices Meeting.

CMP-less integration of fully Ni-silicided metal gates in FinFETs by simultaneous silicidation of the source, drain, and the gate using a novel dual hard mask approach

R. Rooyackers, B. Kaczer, S. Locorotondo, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Integration challenges for multi-gate devices

R. Rooyackers, S. De Gendt, S. Locorotondo, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..