Jong-Yeol Lee

Core-A: A 32-bit Synthesizable Processor Core

Jong-Yeol Lee, Ji-Hoon Kim, Ando Ki, 2015 .

INSTRUCTION SET GENERATION CONSIDERING THE INTERMEDIATE REPRESENTATION OF COMPILERS

Jong-Yeol Lee, In-Cheol Park, I. Park, 2001 .

Timed compiled-code simulation of embedded software for performance analysis of SOC design

In-Cheol Park, I. Park, Jong-Yeol Lee, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Address code generation for DSP instruction-set architectures

J.-Y. Lee, I.-C. Park, I. Park, 2003, TODE.