Qingfeng Zhuge

发表

Design optimization and space minimization considering timing and code size via retiming and unfolding

Meikang Qiu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2006, Microprocess. Microsystems.

Security protection and checking for embedded system integration against buffer overflow attacks via hardware/software

Meikang Qiu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2006, IEEE Transactions on Computers.

Efficient array & pointer bound checking against buffer overflow attacks via hardware/software

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Chun Jason Xue, 2005, International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II.

General loop fusion technique for nested loops considering timing and code size

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Zili Shao, 2004, CASES '04.

Security protection and checking in embedded system integration against buffer overflow attacks

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Chun Jason Xue, 2004, International Conference on Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004..

Memory access schedule minimization for embedded systems

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2012, J. Syst. Archit..

Refinery swap: An efficient swap mechanism for hybrid DRAM-NVM systems

Edwin Hsing-Mean Sha, Ting Wu, Qingfeng Zhuge, 2017, Future Gener. Comput. Syst..

A space allocation and reuse strategy for PCM-based embedded systems

Edwin H.-M. Sha, Shouzhen Gu, Qingfeng Zhuge, 2014, J. Syst. Archit..

Maximize Parallelism for Nested Loops via Loop Striping

Meikang Qiu, Qingfeng Zhuge, Zili Shao, 2006 .

Accelerating Framework of Transformer by Hardware Design and Model Compression Co-Optimization

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Hongwu Peng, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Accommodating Transformer onto FPGA: Coupling the Balanced Model Compression and FPGA-Implementation Optimization

E. Sha, Hongwu Peng, Q. Zhuge, 2021, ACM Great Lakes Symposium on VLSI.

A unified framework for designing high performance in-memory and hybrid memory file systems

Edwin Hsing-Mean Sha, Jun Chen, Jun Xu, 2016, J. Syst. Archit..

Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories

Wei-Che Tseng, Edwin Hsing-Mean Sha, Shouzhen Gu, 2014, IEEE Transactions on Computers.

Write activity reduction on non-volatile main memories for embedded chip multiprocessors

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2013, TECS.

Optimal scheduling to minimize non-volatile memory access time with hardware cache

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

Minimizing write activities to non-volatile memory via scheduling and recomputation

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2010, 2010 IEEE 8th Symposium on Application Specific Processors (SASP).

Write Activity Reduction on Non-volatile Memories via Data Migration and Recomputation for Embedded CMPs

C. Xue, E. Sha, J. Hu, 2010 .

Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory

Yi He, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2013, J. Syst. Archit..

An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks

Mingsong Chen, Edwin Hsing-Mean Sha, Shouzhen Gu, 2017, 2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC).

Pseudo-Log: Restore Global Data Facing Power Failures with Minimum NVM Write

E. Sha, Rui Xu, Yuhong Song, 2022, 2022 IEEE 24th Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys).

Analysis and algorithms design for the partition of large-scale adaptive mobile wireless networks

Jiannong Cao, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2007, Comput. Commun..

Power Efficiency for Hardware/Software Partitioning with Time and Area Constraints on MPSoC

E. Sha, Jing Liu, Li Wang, 2015, International Journal of Parallel Programming.

Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search

Lei Yang, Yiyu Shi, Edwin Hsing-Mean Sha, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

QuanPath: achieving one-step communication for distributed quantum circuit simulation

Yuhong Song, Qingfeng Zhuge, Edwin Hsing-Mean Sha, 2023, Quantum Information Processing.

Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

User Experience Enhanced Task Scheduling and Processor Frequency Scaling for Energy-Sensitive Mobile Devices

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yaoyao Ye, 2015, 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems.

Variable assignment and instruction scheduling for processor with multi-module memory

Meikang Qiu, Lei Zhang, Edwin Hsing-Mean Sha, 2011, Microprocess. Microsystems.

Algorithms and analysis of scheduling for loops with minimum switching

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Chun Jason Xue, 2006, Int. J. Comput. Sci. Eng..

Ensuring consistent recovery under power failure with minimal NVM write overhead

Min Jia, Rui Xu, Qingfeng Zhuge, 2024, Journal of Systems Architecture.

Rapid recovery of program execution under power failures for embedded systems with NVM

E. Sha, Shouzhen Gu, Min Jia, 2023, Microprocess. Microsystems.

Efficient Checkpoint under Unstable Power Supplies on NVM based Devices

Transient computing for energy harvesting systems: A survey

E. Sha, Q. Zhuge, Shouzhen Gu, 2022, J. Syst. Archit..

Optimizing synchronization mechanism for block-based file systems using persistent memory

Duo Liu, Qingfeng Zhuge, Chaoshu Yang, 2020, Future Gener. Comput. Syst..

Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performance

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Weiwen Jiang, 2017, LCTES.

Exploring Multiple-Objective Optimization for Efficient and Effective Test Paper Design with Dynamic Programming Guided Genetic Algorithm.

Jianghua Xia, Rui Xu, Qingfeng Zhuge, 2024, Mathematical biosciences and engineering : MBE.

Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory

E. Sha, J. Hu, Yan Wang, 2013, J. Signal Process. Syst..

Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling

Wei-Che Tseng, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2012, IEEE Transactions on Signal Processing.

Efficient assignment and scheduling for heterogeneous DSP systems

Z. Shao, C. Xue, E. Sha, 2005, IEEE Transactions on Parallel and Distributed Systems.

Optimizing Performance of Persistent Memory File Systems using Virtual Superpages

Qingfeng Zhuge, Chaoshu Yang, Duo Liu, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

DWARM: A wear-aware memory management scheme for in-memory file systems

Lin Wu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, 2018, Future Gener. Comput. Syst..

A New Design of In-Memory File System Based on File Virtual Address Framework

Edwin Hsing-Mean Sha, Liang Shi, Qingfeng Zhuge, 2016, IEEE Transactions on Computers.

Optimizing Address Assignment and Scheduling for DSPs With Multiple Functional Units

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Chun Jason Xue, 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

Switching-activity minimization on instruction-level loop for VLIW DSP applications

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Zili Shao, 2004, Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004..

Switching-Activity Minimization on Instruction-Level Loop Scheduling for VLIWDSP Applications

Edwin H.-M. Sha, Qingfeng Zhuge, Bin Xiao, 2004 .

Loop scheduling with timing and switching-activity minimization for VLIW DSP

Edwin Hsing-Mean Sha, Qingfeng Zhuge, Chun Jason Xue, 2006, TODE.