I. Stamoulis

Pipelined Floating Point Arithmetic Optimized for FPGA Architectures

Martin White, Paul F. Lister, Iakovos Stamoulis, 1999, FPL.

Register Blocking: An Analytical Modelling Approach for Affine Loop Kernels

Vasilios I. Kelefouras, I. Stamoulis, Theologos Anthimopoulos, 2024, CF.