K. Degawa

Phase-based alignment of two signals having partially overlapped spectra

Takahiro J. Yamaguchi, Takafumi Aoki, Katsuhiko Degawa, 2009, 2009 IEEE International Conference on Acoustics, Speech and Signal Processing.

Design of a Two-Bit-Per-Cell Content-Addressable Memory Using Single-Electron Transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2007, J. Multiple Valued Log. Soft Comput..

Systematic Approach to Designing Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language

Takafumi Aoki, Tatsuo Higuchi, Naofumi Homma, 2009, J. Multiple Valued Log. Soft Comput..

Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams

Takafumi Aoki, Tatsuo Higuchi, Naofumi Homma, 2007, J. Multiple Valued Log. Soft Comput..

High-Level Design of Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language

Takafumi Aoki, Tatsuo Higuchi, Naofumi Homma, 2008, 38th International Symposium on Multiple Valued Logic (ismvl 2008).

A field-programmable digital filter chip using multiple-valued current-mode logic

Takafumi Aoki, Tatsuo Higuchi, Katsuhiko Degawa, 2003, 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings..

Prototype Fabrication of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic - Device Scaling and Future Prospects

Takafumi Aoki, Tatsuo Higuchi, Katsuhiko Degawa, 2005, J. Multiple Valued Log. Soft Comput..

A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2004 .

A High-Density Ternary Content-Addressable Memory Using Single-Electron Transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2006, 36th International Symposium on Multiple-Valued Logic (ISMVL'06).

A two-bit-per-cell content-addressable memory using single-electron transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2005, 35th International Symposium on Multiple-Valued Logic (ISMVL'05).

A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic( New System Paradigms for Integrated Electronics)

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2004 .