A. Cerdeira

发表

Simulation of miller OpAmp analog circuit with FinFET transistors

E. Contreras, A. Cerdeira, M. A. Pavanello, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

SOI FinFET compact model for RF circuits simulation

A. Cerdeira, A. G. Martinez-Lopez, J. C. Tinoco, 2013, 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

Extraction procedure for MOS structure fringing gate capacitance components

A. Cerdeira, A. G. Martinez-Lopez, M. Estrada, 2015, 2015 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC).

Considerations on IDDQ test on OTFT circuits

A. Cerdeira, R. Picos, M. Roca, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Continuous compact model for MuGFETs simulations

V. Kilchytska, D. Flandre, A. Cerdeira, 2009, 2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems.

Simulation study of nanoscale double-gate CMOS circuits using compact advanced transport models

E. Contreras, A. Cerdeira, B. Iniguez, 2012, Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012.

RF compact small-signal model for SOI DG-MOSFETs

J.-P. Raskin, A. Cerdeira, M. Estrada, 2010, 2010 27th International Conference on Microelectronics Proceedings.

A Modified EKV PDSOI MOSFETs Model

D. Flandre, A. Cerdeira, J. Alvarado, 2006, 2006 25th International Conference on Microelectronics.

Comparison between nonlinear characteristics of n-channel and p-channel FD SOI MOSFETs

D. Flandre, A. Cerdeira, J.E. Conde, 2004, Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004..

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

D. Flandre, A. Cerdeira, J.A. Martino, 2005, IEEE Transactions on Electron Devices.

Compact small-signal model for RF FinFETs

V. Kilchytska, D. Flandre, E. Contreras, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Nonlinearity Analysis of FinFETs

D. Flandre, A. Cerdeira, K. De Meyer, 2006, 2006 International Caribbean Conference on Devices, Circuits and Systems.

Graded-Channel SOI nMOSFET Model Valid for Harmonic Distortion Evaluation

D. Flandre, A. Cerdeira, M.A. Pavanello, 2006, 2006 25th International Conference on Microelectronics.

MuGFETs for microwave and millimeter wave applications

J.-P. Raskin, A. Cerdeira, M. Estrada, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Verilog - A Implementation of ICS Model for PD SOI Devices

E. Contreras, A. Cerdeira, J. Alvarado, 2007, 2007 4th International Conference on Electrical and Electronics Engineering.

Simulation of a Miller OpAmp with FinFETs at High Temperatures

Marcelo Antonio Pavanello, A. Cerdeira, Esteban Contreras, 2012 .

High deposition rate a-Si:H layers from pure SiH4 and from a 10% dilution of SiH4 in H2

A. Cerdeira, M. Estrada, Inés Pereyra, 2000 .

Unified extraction method for amorphous and polycrystalline TFT above threshold model parameters

A. Cerdeira, B. Iniguez, M. Estrada, 2002, Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.02TH8611).

Effect of Density of States on Mobility in Small-Molecule n-Type Organic Thin-Film Transistors Based on a Perylene Diimide

G. Ghibaudo, A. Cerdeira, A. Castro-Carranza, 2012, IEEE Electron Device Letters.

Impact of Asymmetric Channel Configuration on the Linearity of Double-Gate SOI MOSFETs

D. Flandre, A. Cerdeira, D. Flandre, 2006, 2006 International Caribbean Conference on Devices, Circuits and Systems.

Mathematical basis of the expressions used by the integral function method for the determination of nonlinear harmonic distortion in devices and circuits

A. Cerdeira, M. Estrada, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

Modelling of Thin Film Transistors for Circuit Simulation

A. Cerdeira, R. Picos, M. Estrada, 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.

Analytic modeling of gate tunneling currents for nano-scale double-gate MOSFETs

D. Flandre, A. Cerdeira, M. Estrada, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Modeling of reverse current behavior in amorphous thin and thick p-i-n diodes

A. Cerdeira, M. Estrada, M. Estrada, 2000 .

An efficient and accurate procedure to evaluate distortion in SOI FD MOSFET

D. Flandre, F.J. Garcia Sanchez, A. Cerdeira, 2001, 2001 International Semiconductor Device Research Symposium. Symposium Proceedings (Cat. No.01EX497).